address comment

Author: broxigarchen

llvm/lib/Target/AMDGPU/SIFoldOperands.cpp

@@ -1820,7 +1820,7 @@ bool SIFoldOperandsImpl::tryFoldClamp(MachineInstr &MI) {
     return false;
 
   // Look through COPY. COPY only observed with True16.
-  MachineOperand *DefSrc = TRI->lookThruCopyLike(ClampSrc->getReg(), MRI);
+  MachineOperand *DefSrc = lookUpCopyChain(*TII, *MRI, ClampSrc->getReg());
   MachineInstr *Def = MRI->getVRegDef(DefSrc && DefSrc->isReg() ? DefSrc->getReg() : ClampSrc->getReg());
 
   // The type of clamp must be compatible.

llvm/test/CodeGen/AMDGPU/true16-fold.mir

@@ -16,10 +16,9 @@ body:             |
     ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
     ; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
     ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
-    ; CHECK-NEXT: [[V_FMA_MIXLO_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_MIXLO_F16 8, [[COPY2]], 8, [[COPY1]], 0, [[COPY]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec
+    ; CHECK-NEXT: [[V_FMA_MIXLO_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_MIXLO_F16 8, [[COPY2]], 8, [[COPY1]], 0, [[COPY]], 1, [[COPY3]], 0, 0, implicit $mode, implicit $exec
     ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_16 = COPY [[V_FMA_MIXLO_F16_]]
-    ; CHECK-NEXT: [[V_MAX_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_MAX_F16_t16_e64 0, [[COPY4]], 0, [[COPY4]], -1, 0, 0, implicit $mode, implicit $exec
-    ; CHECK-NEXT: $vgpr0 = COPY [[V_MAX_F16_t16_e64_]]
+    ; CHECK-NEXT: $vgpr0 = COPY [[V_FMA_MIXLO_F16_]]
     ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr0
     %0:vgpr_32 = COPY $vgpr2
     %1:vgpr_32 = COPY $vgpr1
@@ -34,13 +33,13 @@ body:             |
 ...
 
 ---
-name:            fold_16bit_subreg_folded_clamp
+name:            fold_16bit_subreg_1_clamp
 tracksRegLiveness: true
 registers:
 body:             |
   bb.0:
     liveins: $vgpr0, $vgpr1, $vgpr2
-    ; CHECK-LABEL: name: fold_16bit_madmix_clamp
+    ; CHECK-LABEL: name: fold_16bit_subreg_1_clamp
     ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2
     ; CHECK-NEXT: {{  $}}
     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr2
@@ -49,8 +48,7 @@ body:             |
     ; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
     ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
     ; CHECK-NEXT: [[V_FMA_MIXLO_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_MIXLO_F16 8, [[COPY2]], 8, [[COPY1]], 0, [[COPY]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec
-    ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_16 = COPY [[V_FMA_MIXLO_F16_]]
-    ; CHECK-NEXT: [[V_MAX_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_MAX_F16_t16_e64 0, [[COPY4]], 0, [[COPY4]], -1, 0, 0, implicit $mode, implicit $exec
+    ; CHECK-NEXT: [[V_MAX_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_MAX_F16_t16_e64 0, [[V_FMA_MIXLO_F16_]].lo16, 0, [[V_FMA_MIXLO_F16_]].lo16, -1, 0, 0, implicit $mode, implicit $exec
     ; CHECK-NEXT: $vgpr0 = COPY [[V_MAX_F16_t16_e64_]]
     ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr0
     %0:vgpr_32 = COPY $vgpr2
@@ -65,13 +63,13 @@ body:             |
 ...
 
 ---
-name:            fold_16bit_subreg_clamp
+name:            fold_16bit_subreg_2_clamp
 tracksRegLiveness: true
 registers:
 body:             |
   bb.0:
     liveins: $vgpr0, $vgpr1, $vgpr2
-    ; CHECK-LABEL: name: fold_16bit_subreg_clamp
+    ; CHECK-LABEL: name: fold_16bit_subreg_2_clamp
     ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2
     ; CHECK-NEXT: {{  $}}
     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr2
@@ -110,10 +108,9 @@ body:             |
     ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr0
     ; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
     ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
-    ; CHECK-NEXT: [[V_FMA_MIXLO_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_MIXLO_F16 8, [[COPY2]], 8, [[COPY1]], 0, [[COPY]], 0, [[COPY3]], 0, 0, implicit $mode, implicit $exec
+    ; CHECK-NEXT: [[V_FMA_MIXLO_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_MIXLO_F16 8, [[COPY2]], 8, [[COPY1]], 0, [[COPY]], 1, [[COPY3]], 0, 0, implicit $mode, implicit $exec
     ; CHECK-NEXT: $vgpr10_lo16 = COPY [[V_FMA_MIXLO_F16_]]
-    ; CHECK-NEXT: [[V_MAX_F16_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_MAX_F16_t16_e64 0, $vgpr10_lo16, 0, $vgpr10_lo16, -1, 0, 0, implicit $mode, implicit $exec
-    ; CHECK-NEXT: $vgpr0 = COPY [[V_MAX_F16_t16_e64_]]
+    ; CHECK-NEXT: $vgpr0 = COPY [[V_FMA_MIXLO_F16_]]
     ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr0
     %0:vgpr_32 = COPY $vgpr2
     %1:vgpr_32 = COPY $vgpr1