Skip to content

Commit 29aa2a8

Browse files
committed
address comments
1 parent 422065b commit 29aa2a8

File tree

1 file changed

+22
-30
lines changed

1 file changed

+22
-30
lines changed

llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp

Lines changed: 22 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -979,26 +979,23 @@ bool NVPTXDAGToDAGISel::tryLoad(SDNode *N) {
979979
Opcode = pickOpcodeForVT(TargetVT, NVPTX::LD_i8_asi, NVPTX::LD_i16_asi,
980980
NVPTX::LD_i32_asi, NVPTX::LD_i64_asi,
981981
NVPTX::LD_f32_asi, NVPTX::LD_f64_asi);
982-
if (!Opcode)
983-
return false;
984-
Ops.append({Base, Offset, Chain});
985982
} else {
986-
PointerSize == 64 ? SelectADDRri64(N1.getNode(), N1, Base, Offset)
987-
: SelectADDRri(N1.getNode(), N1, Base, Offset);
988-
989-
if (PointerSize == 64)
983+
if (PointerSize == 64) {
984+
SelectADDRri64(N1.getNode(), N1, Base, Offset);
990985
Opcode =
991986
pickOpcodeForVT(TargetVT, NVPTX::LD_i8_ari_64, NVPTX::LD_i16_ari_64,
992987
NVPTX::LD_i32_ari_64, NVPTX::LD_i64_ari_64,
993988
NVPTX::LD_f32_ari_64, NVPTX::LD_f64_ari_64);
994-
else
989+
} else {
990+
SelectADDRri(N1.getNode(), N1, Base, Offset);
995991
Opcode = pickOpcodeForVT(TargetVT, NVPTX::LD_i8_ari, NVPTX::LD_i16_ari,
996992
NVPTX::LD_i32_ari, NVPTX::LD_i64_ari,
997993
NVPTX::LD_f32_ari, NVPTX::LD_f64_ari);
998-
if (!Opcode)
999-
return false;
1000-
Ops.append({Base, Offset, Chain});
994+
}
1001995
}
996+
if (!Opcode)
997+
return false;
998+
Ops.append({Base, Offset, Chain});
1002999

10031000
SDNode *NVPTXLD =
10041001
CurDAG->getMachineNode(*Opcode, DL, TargetVT, MVT::Other, Ops);
@@ -1114,10 +1111,8 @@ bool NVPTXDAGToDAGISel::tryLoadVector(SDNode *N) {
11141111
return false;
11151112
Ops.append({Base, Offset, Chain});
11161113
} else {
1117-
PointerSize == 64 ? SelectADDRri64(Op1.getNode(), Op1, Base, Offset)
1118-
: SelectADDRri(Op1.getNode(), Op1, Base, Offset);
1119-
11201114
if (PointerSize == 64) {
1115+
SelectADDRri64(Op1.getNode(), Op1, Base, Offset);
11211116
switch (N->getOpcode()) {
11221117
default:
11231118
return false;
@@ -1136,6 +1131,7 @@ bool NVPTXDAGToDAGISel::tryLoadVector(SDNode *N) {
11361131
break;
11371132
}
11381133
} else {
1134+
SelectADDRri(Op1.getNode(), Op1, Base, Offset);
11391135
switch (N->getOpcode()) {
11401136
default:
11411137
return false;
@@ -1265,10 +1261,8 @@ bool NVPTXDAGToDAGISel::tryLDGLDU(SDNode *N) {
12651261
SDValue Ops[] = { Addr, Chain };
12661262
LD = CurDAG->getMachineNode(*Opcode, DL, InstVTList, Ops);
12671263
} else {
1268-
TM.is64Bit() ? SelectADDRri64(Op1.getNode(), Op1, Base, Offset)
1269-
: SelectADDRri(Op1.getNode(), Op1, Base, Offset);
1270-
12711264
if (TM.is64Bit()) {
1265+
SelectADDRri64(Op1.getNode(), Op1, Base, Offset);
12721266
switch (N->getOpcode()) {
12731267
default:
12741268
return false;
@@ -1324,6 +1318,7 @@ bool NVPTXDAGToDAGISel::tryLDGLDU(SDNode *N) {
13241318
break;
13251319
}
13261320
} else {
1321+
SelectADDRri(Op1.getNode(), Op1, Base, Offset);
13271322
switch (N->getOpcode()) {
13281323
default:
13291324
return false;
@@ -1478,25 +1473,23 @@ bool NVPTXDAGToDAGISel::tryStore(SDNode *N) {
14781473
Opcode = pickOpcodeForVT(SourceVT, NVPTX::ST_i8_asi, NVPTX::ST_i16_asi,
14791474
NVPTX::ST_i32_asi, NVPTX::ST_i64_asi,
14801475
NVPTX::ST_f32_asi, NVPTX::ST_f64_asi);
1481-
if (!Opcode)
1482-
return false;
1483-
Ops.append({Base, Offset, Chain});
14841476
} else {
1485-
PointerSize == 64 ? SelectADDRri64(BasePtr.getNode(), BasePtr, Base, Offset)
1486-
: SelectADDRri(BasePtr.getNode(), BasePtr, Base, Offset);
1487-
if (PointerSize == 64)
1477+
if (PointerSize == 64) {
1478+
SelectADDRri64(BasePtr.getNode(), BasePtr, Base, Offset);
14881479
Opcode =
14891480
pickOpcodeForVT(SourceVT, NVPTX::ST_i8_ari_64, NVPTX::ST_i16_ari_64,
14901481
NVPTX::ST_i32_ari_64, NVPTX::ST_i64_ari_64,
14911482
NVPTX::ST_f32_ari_64, NVPTX::ST_f64_ari_64);
1492-
else
1483+
} else {
1484+
SelectADDRri(BasePtr.getNode(), BasePtr, Base, Offset);
14931485
Opcode = pickOpcodeForVT(SourceVT, NVPTX::ST_i8_ari, NVPTX::ST_i16_ari,
14941486
NVPTX::ST_i32_ari, NVPTX::ST_i64_ari,
14951487
NVPTX::ST_f32_ari, NVPTX::ST_f64_ari);
1496-
if (!Opcode)
1497-
return false;
1498-
Ops.append({Base, Offset, Chain});
1488+
}
14991489
}
1490+
if (!Opcode)
1491+
return false;
1492+
Ops.append({Base, Offset, Chain});
15001493

15011494
SDNode *NVPTXST = CurDAG->getMachineNode(*Opcode, DL, MVT::Other, Ops);
15021495

@@ -1587,10 +1580,8 @@ bool NVPTXDAGToDAGISel::tryStoreVector(SDNode *N) {
15871580
}
15881581
Ops.append({Base, Offset});
15891582
} else {
1590-
PointerSize == 64 ? SelectADDRri64(N2.getNode(), N2, Base, Offset)
1591-
: SelectADDRri(N2.getNode(), N2, Base, Offset);
1592-
15931583
if (PointerSize == 64) {
1584+
SelectADDRri64(N2.getNode(), N2, Base, Offset);
15941585
switch (N->getOpcode()) {
15951586
default:
15961587
return false;
@@ -1609,6 +1600,7 @@ bool NVPTXDAGToDAGISel::tryStoreVector(SDNode *N) {
16091600
break;
16101601
}
16111602
} else {
1603+
SelectADDRri(N2.getNode(), N2, Base, Offset);
16121604
switch (N->getOpcode()) {
16131605
default:
16141606
return false;

0 commit comments

Comments
 (0)