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4vtomat4vtomat
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fixup! fixed comments
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4 files changed

+57
-28
lines changed

4 files changed

+57
-28
lines changed

‎clang/include/clang/Driver/Options.td‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4992,6 +4992,7 @@ def mrvv_vector_bits_EQ : Joined<["-"], "mrvv-vector-bits=">, Group<m_Group>,
49924992
!eq(GlobalDocumentation.Program, "Flang") : "",
49934993
true: " The value will be reflected in __riscv_v_fixed_vlen preprocessor define"),
49944994
" (RISC-V only)")>;
4995+
49954996
def munaligned_access : Flag<["-"], "munaligned-access">, Group<m_Group>,
49964997
HelpText<"Allow memory accesses to be unaligned (AArch32/MIPSr6 only)">;
49974998
def mno_unaligned_access : Flag<["-"], "mno-unaligned-access">, Group<m_Group>,

‎clang/lib/CodeGen/Targets/RISCV.cpp‎

Lines changed: 16 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -118,7 +118,7 @@ void RISCVABIInfo::computeInfo(CGFunctionInfo &FI) const {
118118
unsigned ABIVLen;
119119
switch (FI.getExtInfo().getCC()) {
120120
default:
121-
ABIVLen = 1;
121+
ABIVLen = 0;
122122
break;
123123
case CallingConv::CC_RISCVVLSCall_32:
124124
ABIVLen = 32;
@@ -414,28 +414,34 @@ bool RISCVABIInfo::detectVLSCCEligibleStruct(QualType Ty, unsigned ABIVLen,
414414
// Legal struct for VLS calling convention should fulfill following rules:
415415
// 1. Struct element should be either "homogeneous fixed-length vectors" or "a
416416
// fixed-length vector array".
417-
// 2. Number of struct elements or array elements should be power of 2.
417+
// 2. Number of struct elements or array elements should be greater or equal
418+
// to 1 and less or equal to 8
418419
// 3. Total number of vector registers needed should not exceed 8.
419420
//
420421
// Examples: Assume ABI_VLEN = 128.
421422
// These are legal structs:
422-
// a. Structs with 1, 2, 4 or 8 "same" fixed-length vectors, e.g.
423+
// a. Structs with 1~8 "same" fixed-length vectors, e.g.
423424
// struct {
424425
// __attribute__((vector_size(16))) int a;
425426
// __attribute__((vector_size(16))) int b;
426427
// }
427428
//
428-
// b. Structs with "single" fixed-length vector array with lengh 1, 2, 4
429-
// or 8, e.g.
429+
// b. Structs with "single" fixed-length vector array with lengh 1~8, e.g.
430430
// struct {
431-
// __attribute__((vector_size(16))) int a[2];
431+
// __attribute__((vector_size(16))) int a[3];
432432
// }
433433
// These are illegal structs:
434-
// a. Structs with 3 fixed-length vectors, e.g.
434+
// a. Structs with 9 fixed-length vectors, e.g.
435435
// struct {
436436
// __attribute__((vector_size(16))) int a;
437437
// __attribute__((vector_size(16))) int b;
438438
// __attribute__((vector_size(16))) int c;
439+
// __attribute__((vector_size(16))) int d;
440+
// __attribute__((vector_size(16))) int e;
441+
// __attribute__((vector_size(16))) int f;
442+
// __attribute__((vector_size(16))) int g;
443+
// __attribute__((vector_size(16))) int h;
444+
// __attribute__((vector_size(16))) int i;
439445
// }
440446
//
441447
// b. Structs with "multiple" fixed-length vector array, e.g.
@@ -461,7 +467,7 @@ bool RISCVABIInfo::detectVLSCCEligibleStruct(QualType Ty, unsigned ABIVLen,
461467

462468
if (llvm::StructType *STy = dyn_cast<llvm::StructType>(CGT.ConvertType(Ty))) {
463469
int NumElts = STy->getStructNumElements();
464-
if (NumElts > 8 || !llvm::isPowerOf2_32(NumElts))
470+
if (NumElts > 8)
465471
return false;
466472

467473
auto *FirstEltTy = STy->getElementType(0);
@@ -517,7 +523,7 @@ bool RISCVABIInfo::detectVLSCCEligibleStruct(QualType Ty, unsigned ABIVLen,
517523
// if legal.
518524
if (auto *ArrTy = dyn_cast<llvm::ArrayType>(FirstEltTy)) {
519525
int NumArrElt = ArrTy->getNumElements();
520-
if (NumArrElt > 8 || !llvm::isPowerOf2_32(NumArrElt))
526+
if (NumArrElt > 8)
521527
return false;
522528

523529
auto *ArrEltTy = dyn_cast<llvm::FixedVectorType>(ArrTy->getElementType());
@@ -728,7 +734,7 @@ ABIArgInfo RISCVABIInfo::classifyArgumentType(QualType Ty, bool IsFixed,
728734
VT->getVectorKind() == VectorKind::RVVFixedLengthMask_2 ||
729735
VT->getVectorKind() == VectorKind::RVVFixedLengthMask_4)
730736
return coerceVLSVector(Ty);
731-
if (VT->getVectorKind() == VectorKind::Generic && ABIVLen != 1)
737+
if (VT->getVectorKind() == VectorKind::Generic && ABIVLen != 0)
732738
// Generic vector without riscv_vls_cc should fall through and pass by
733739
// reference.
734740
return coerceVLSVector(Ty, ABIVLen);

‎clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c‎

Lines changed: 20 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -69,39 +69,45 @@ void __attribute__((riscv_vls_cc(1024))) test_vls_least_element(__attribute__((v
6969
[[riscv::vls_cc(1024)]] void test_vls_least_element_c23(__attribute__((vector_size(8))) int arg) {}
7070

7171

72-
struct st_i32x4{
72+
struct st_i32x4 {
7373
__attribute__((vector_size(16))) int i32;
7474
};
7575

76-
struct st_i32x4_arr1{
76+
struct st_i32x4_arr1 {
7777
__attribute__((vector_size(16))) int i32[1];
7878
};
7979

80-
struct st_i32x4_arr4{
80+
struct st_i32x4_arr4 {
8181
__attribute__((vector_size(16))) int i32[4];
8282
};
8383

84-
struct st_i32x4_arr8{
84+
struct st_i32x4_arr8 {
8585
__attribute__((vector_size(16))) int i32[8];
8686
};
8787

8888

89-
struct st_i32x4x2{
89+
struct st_i32x4x2 {
9090
__attribute__((vector_size(16))) int i32_1;
9191
__attribute__((vector_size(16))) int i32_2;
9292
};
9393

94-
struct st_i32x8x2{
94+
struct st_i32x8x2 {
9595
__attribute__((vector_size(32))) int i32_1;
9696
__attribute__((vector_size(32))) int i32_2;
9797
};
9898

99-
struct st_i32x64x2{
99+
struct st_i32x64x2 {
100100
__attribute__((vector_size(256))) int i32_1;
101101
__attribute__((vector_size(256))) int i32_2;
102102
};
103103

104-
struct st_i32x4x8{
104+
struct st_i32x4x3 {
105+
__attribute__((vector_size(16))) int i32_1;
106+
__attribute__((vector_size(16))) int i32_2;
107+
__attribute__((vector_size(16))) int i32_3;
108+
};
109+
110+
struct st_i32x4x8 {
105111
__attribute__((vector_size(16))) int i32_1;
106112
__attribute__((vector_size(16))) int i32_2;
107113
__attribute__((vector_size(16))) int i32_3;
@@ -112,7 +118,7 @@ struct st_i32x4x8{
112118
__attribute__((vector_size(16))) int i32_8;
113119
};
114120

115-
struct st_i32x4x9{
121+
struct st_i32x4x9 {
116122
__attribute__((vector_size(16))) int i32_1;
117123
__attribute__((vector_size(16))) int i32_2;
118124
__attribute__((vector_size(16))) int i32_3;
@@ -166,6 +172,11 @@ void __attribute__((riscv_vls_cc)) test_st_i32x64x2(struct st_i32x64x2 arg) {}
166172
// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @test_st_i32x64x2_256(ptr noundef %arg)
167173
void __attribute__((riscv_vls_cc(256))) test_st_i32x64x2_256(struct st_i32x64x2 arg) {}
168174

175+
// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @test_st_i32x4x3(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %arg)
176+
void __attribute__((riscv_vls_cc)) test_st_i32x4x3(struct st_i32x4x3 arg) {}
177+
// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @test_st_i32x4x3_256(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %arg)
178+
void __attribute__((riscv_vls_cc(256))) test_st_i32x4x3_256(struct st_i32x4x3 arg) {}
179+
169180
// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @test_st_i32x4x8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %arg)
170181
void __attribute__((riscv_vls_cc)) test_st_i32x4x8(struct st_i32x4x8 arg) {}
171182
// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @test_st_i32x4x8_256(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %arg)

‎clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp‎

Lines changed: 20 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -52,39 +52,45 @@ void test_vls_no_cc(__attribute__((vector_size(16))) int arg) {}
5252
[[riscv::vls_cc(1024)]] void test_vls_least_element(__attribute__((vector_size(8))) int arg) {}
5353

5454

55-
struct st_i32x4{
55+
struct st_i32x4 {
5656
__attribute__((vector_size(16))) int i32;
5757
};
5858

59-
struct st_i32x4_arr1{
59+
struct st_i32x4_arr1 {
6060
__attribute__((vector_size(16))) int i32[1];
6161
};
6262

63-
struct st_i32x4_arr4{
63+
struct st_i32x4_arr4 {
6464
__attribute__((vector_size(16))) int i32[4];
6565
};
6666

67-
struct st_i32x4_arr8{
67+
struct st_i32x4_arr8 {
6868
__attribute__((vector_size(16))) int i32[8];
6969
};
7070

7171

72-
struct st_i32x4x2{
72+
struct st_i32x4x2 {
7373
__attribute__((vector_size(16))) int i32_1;
7474
__attribute__((vector_size(16))) int i32_2;
7575
};
7676

77-
struct st_i32x8x2{
77+
struct st_i32x8x2 {
7878
__attribute__((vector_size(32))) int i32_1;
7979
__attribute__((vector_size(32))) int i32_2;
8080
};
8181

82-
struct st_i32x64x2{
82+
struct st_i32x64x2 {
8383
__attribute__((vector_size(256))) int i32_1;
8484
__attribute__((vector_size(256))) int i32_2;
8585
};
8686

87-
struct st_i32x4x8{
87+
struct st_i32x4x3 {
88+
__attribute__((vector_size(16))) int i32_1;
89+
__attribute__((vector_size(16))) int i32_2;
90+
__attribute__((vector_size(16))) int i32_3;
91+
};
92+
93+
struct st_i32x4x8 {
8894
__attribute__((vector_size(16))) int i32_1;
8995
__attribute__((vector_size(16))) int i32_2;
9096
__attribute__((vector_size(16))) int i32_3;
@@ -95,7 +101,7 @@ struct st_i32x4x8{
95101
__attribute__((vector_size(16))) int i32_8;
96102
};
97103

98-
struct st_i32x4x9{
104+
struct st_i32x4x9 {
99105
__attribute__((vector_size(16))) int i32_1;
100106
__attribute__((vector_size(16))) int i32_2;
101107
__attribute__((vector_size(16))) int i32_3;
@@ -149,6 +155,11 @@ typedef int __attribute__((vector_size(256))) int32x64_t;
149155
// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z20test_st_i32x64x2_25611st_i32x64x2(ptr noundef %arg)
150156
[[riscv::vls_cc(256)]] void test_st_i32x64x2_256(struct st_i32x64x2 arg) {}
151157

158+
// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z15test_st_i32x4x310st_i32x4x3(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) %arg)
159+
[[riscv::vls_cc]] void test_st_i32x4x3(struct st_i32x4x3 arg) {}
160+
// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z19test_st_i32x4x3_25610st_i32x4x3(target("riscv.vector.tuple", <vscale x 4 x i8>, 3) %arg)
161+
[[riscv::vls_cc(256)]] void test_st_i32x4x3_256(struct st_i32x4x3 arg) {}
162+
152163
// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z15test_st_i32x4x810st_i32x4x8(target("riscv.vector.tuple", <vscale x 8 x i8>, 8) %arg)
153164
[[riscv::vls_cc]] void test_st_i32x4x8(struct st_i32x4x8 arg) {}
154165
// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z19test_st_i32x4x8_25610st_i32x4x8(target("riscv.vector.tuple", <vscale x 4 x i8>, 8) %arg)

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