@@ -185,8 +185,13 @@ else:
185185
186186define void @test_icmp_complex (i1 %c , i32 %a , i32 %b ) {
187187; CHECK-LABEL: @test_icmp_complex(
188+ ; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[ELSE:%.*]]
189+ ; CHECK: if:
188190; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
189191; CHECK-NEXT: br i1 [[CMP1]], label [[IF2:%.*]], label [[ELSE2:%.*]]
192+ ; CHECK: else:
193+ ; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[B]], [[A]]
194+ ; CHECK-NEXT: br i1 [[CMP2]], label [[IF2]], label [[ELSE2]]
190195; CHECK: common.ret:
191196; CHECK-NEXT: ret void
192197; CHECK: if2:
@@ -486,3 +491,131 @@ else:
486491 call void @bar ()
487492 ret float %op2
488493}
494+
495+ define void @test_switch_with_unreachable_block_as_default (i1 %c , i32 %x , ptr %ptr ) {
496+ ; CHECK-LABEL: @test_switch_with_unreachable_block_as_default(
497+ ; CHECK-NEXT: br i1 [[C:%.*]], label [[SW1:%.*]], label [[SW2:%.*]]
498+ ; CHECK: sw1:
499+ ; CHECK-NEXT: switch i32 [[X:%.*]], label [[UNREACHABLE:%.*]] [
500+ ; CHECK-NEXT: i32 1, label [[COMMON_RET:%.*]]
501+ ; CHECK-NEXT: i32 2, label [[BAR:%.*]]
502+ ; CHECK-NEXT: ]
503+ ; CHECK: sw2:
504+ ; CHECK-NEXT: switch i32 [[X]], label [[UNREACHABLE]] [
505+ ; CHECK-NEXT: i32 1, label [[BB1:%.*]]
506+ ; CHECK-NEXT: i32 2, label [[BB2:%.*]]
507+ ; CHECK-NEXT: i32 3, label [[BB3:%.*]]
508+ ; CHECK-NEXT: ]
509+ ; CHECK: common.ret:
510+ ; CHECK-NEXT: ret void
511+ ; CHECK: bb1:
512+ ; CHECK-NEXT: store i64 42, ptr [[PTR:%.*]], align 4
513+ ; CHECK-NEXT: br label [[COMMON_RET]]
514+ ; CHECK: bb2:
515+ ; CHECK-NEXT: store i64 42, ptr [[PTR]], align 4
516+ ; CHECK-NEXT: br label [[COMMON_RET]]
517+ ; CHECK: bb3:
518+ ; CHECK-NEXT: store i64 42, ptr [[PTR]], align 4
519+ ; CHECK-NEXT: br label [[COMMON_RET]]
520+ ; CHECK: unreachable:
521+ ; CHECK-NEXT: unreachable
522+ ; CHECK: bar:
523+ ; CHECK-NEXT: call void @bar()
524+ ; CHECK-NEXT: br label [[COMMON_RET]]
525+ ;
526+ br i1 %c , label %sw1 , label %sw2
527+
528+ sw1:
529+ ; This switch only exists to have an %unreachable block with multiple predecessors.
530+ switch i32 %x , label %unreachable [
531+ i32 1 , label %foo
532+ i32 2 , label %bar
533+ ]
534+
535+ sw2:
536+ switch i32 %x , label %unreachable [
537+ i32 1 , label %bb1
538+ i32 2 , label %bb2
539+ i32 3 , label %bb3
540+ ]
541+
542+ bb1:
543+ store i64 42 , ptr %ptr
544+ ret void
545+
546+ bb2:
547+ store i64 42 , ptr %ptr
548+ ret void
549+
550+ bb3:
551+ store i64 42 , ptr %ptr
552+ ret void
553+
554+ unreachable:
555+ unreachable
556+
557+ foo:
558+ ret void
559+
560+ bar:
561+ call void @bar ()
562+ ret void
563+ }
564+
565+ define void @test_switch_with_unreachable_block_as_case (i1 %c , i32 %x , ptr %ptr ) {
566+ ; CHECK-LABEL: @test_switch_with_unreachable_block_as_case(
567+ ; CHECK-NEXT: br i1 [[C:%.*]], label [[SW1:%.*]], label [[SW2:%.*]]
568+ ; CHECK: sw1:
569+ ; CHECK-NEXT: switch i32 [[X:%.*]], label [[UNREACHABLE:%.*]] [
570+ ; CHECK-NEXT: i32 1, label [[COMMON_RET:%.*]]
571+ ; CHECK-NEXT: i32 2, label [[BAR:%.*]]
572+ ; CHECK-NEXT: ]
573+ ; CHECK: sw2:
574+ ; CHECK-NEXT: store i64 42, ptr [[PTR:%.*]], align 4
575+ ; CHECK-NEXT: br label [[COMMON_RET]]
576+ ; CHECK: common.ret:
577+ ; CHECK-NEXT: ret void
578+ ; CHECK: unreachable:
579+ ; CHECK-NEXT: unreachable
580+ ; CHECK: bar:
581+ ; CHECK-NEXT: call void @bar()
582+ ; CHECK-NEXT: br label [[COMMON_RET]]
583+ ;
584+ br i1 %c , label %sw1 , label %sw2
585+
586+ sw1:
587+ ; This switch only exists to have an %unreachable block with multiple predecessors.
588+ switch i32 %x , label %unreachable [
589+ i32 1 , label %foo
590+ i32 2 , label %bar
591+ ]
592+
593+ sw2:
594+ switch i32 %x , label %bb3 [
595+ i32 1 , label %bb1
596+ i32 2 , label %bb2
597+ i32 3 , label %unreachable
598+ ]
599+
600+ bb1:
601+ store i64 42 , ptr %ptr
602+ ret void
603+
604+ bb2:
605+ store i64 42 , ptr %ptr
606+ ret void
607+
608+ bb3:
609+ store i64 42 , ptr %ptr
610+ ret void
611+
612+ unreachable:
613+ unreachable
614+
615+ foo:
616+ ret void
617+
618+ bar:
619+ call void @bar ()
620+ ret void
621+ }
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