@@ -5122,27 +5122,23 @@ defm INT_SET_MAXNREG_DEC : SET_MAXNREG<"dec", int_nvvm_setmaxnreg_dec_sync_align
51225122//
51235123// WGMMA fence instructions
51245124//
5125- let isConvergent = true in {
5126- def INT_NVVM_WGMMA_FENCE_SYNC_ALIGNED : BasicNVPTXInst<(outs), (ins), "wgmma.fence.sync.aligned",
5127- [(int_nvvm_wgmma_fence_sync_aligned)]>, Requires<[hasSM90a, hasPTX<80>]>;
5125+ let isConvergent = true, Predicates = [hasSM90a, hasPTX<80>] in {
5126+ def WGMMA_FENCE_SYNC_ALIGNED : NullaryInst<"wgmma.fence.sync.aligned", int_nvvm_wgmma_fence_sync_aligned>;
51285127
5129- def INT_NVVM_WGMMA_COMMIT_GROUP_SYNC_ALIGNED : BasicNVPTXInst<(outs), (ins), "wgmma.commit_group.sync.aligned",
5130- [(int_nvvm_wgmma_commit_group_sync_aligned)]>, Requires<[hasSM90a, hasPTX<80>]>;
5128+ def WGMMA_COMMIT_GROUP_SYNC_ALIGNED : NullaryInst<"wgmma.commit_group.sync.aligned", int_nvvm_wgmma_commit_group_sync_aligned>;
51315129
5132- def INT_NVVM_WGMMA_WAIT_GROUP_SYNC_ALIGNED : BasicNVPTXInst<(outs), (ins i64imm:$n), "wgmma.wait_group.sync.aligned",
5133- [(int_nvvm_wgmma_wait_group_sync_aligned timm:$n)]>, Requires<[hasSM90a, hasPTX<80>]> ;
5130+ def WGMMA_WAIT_GROUP_SYNC_ALIGNED : BasicNVPTXInst<(outs), (ins i64imm:$n), "wgmma.wait_group.sync.aligned",
5131+ [(int_nvvm_wgmma_wait_group_sync_aligned timm:$n)]>;
51345132} // isConvergent = true
51355133
51365134let Predicates = [hasSM<90>, hasPTX<78>] in {
51375135 def GRIDDEPCONTROL_LAUNCH_DEPENDENTS :
5138- BasicNVPTXInst<(outs), (ins), "griddepcontrol.launch_dependents",
5139- [(int_nvvm_griddepcontrol_launch_dependents)]>;
5136+ NullaryInst<"griddepcontrol.launch_dependents", int_nvvm_griddepcontrol_launch_dependents>;
51405137 def GRIDDEPCONTROL_WAIT :
5141- BasicNVPTXInst<(outs), (ins), "griddepcontrol.wait",
5142- [(int_nvvm_griddepcontrol_wait)]>;
5138+ NullaryInst<"griddepcontrol.wait", int_nvvm_griddepcontrol_wait>;
51435139}
51445140
5145- def INT_EXIT : BasicNVPTXInst<(outs), (ins), "exit", [( int_nvvm_exit)] >;
5141+ def EXIT : NullaryInst< "exit", int_nvvm_exit>;
51465142
51475143// Tcgen05 intrinsics
51485144let isConvergent = true, Predicates = [hasTcgen05Instructions] in {
@@ -5170,9 +5166,7 @@ defm TCGEN05_DEALLOC_CG1: TCGEN05_DEALLOC_INTR<"1", int_nvvm_tcgen05_dealloc_cg1
51705166defm TCGEN05_DEALLOC_CG2: TCGEN05_DEALLOC_INTR<"2", int_nvvm_tcgen05_dealloc_cg2>;
51715167
51725168multiclass TCGEN05_RELINQ_PERMIT_INTR<string num, Intrinsic Intr> {
5173- def "" : BasicNVPTXInst<(outs), (ins),
5174- "tcgen05.relinquish_alloc_permit.cta_group::" # num # ".sync.aligned",
5175- [(Intr)]>;
5169+ def "" : NullaryInst<"tcgen05.relinquish_alloc_permit.cta_group::" # num # ".sync.aligned", Intr>;
51765170}
51775171defm TCGEN05_RELINQ_CG1: TCGEN05_RELINQ_PERMIT_INTR<"1", int_nvvm_tcgen05_relinq_alloc_permit_cg1>;
51785172defm TCGEN05_RELINQ_CG2: TCGEN05_RELINQ_PERMIT_INTR<"2", int_nvvm_tcgen05_relinq_alloc_permit_cg2>;
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