@@ -495,13 +495,14 @@ class CodeGenSchedModels {
495495 return ProcModels[I->second ];
496496 }
497497
498- CodeGenProcModel &getProcModel (const Record *ModelDef) {
498+ const CodeGenProcModel &getProcModel (const Record *ModelDef) const {
499499 ProcModelMapTy::const_iterator I = ProcModelMap.find (ModelDef);
500500 assert (I != ProcModelMap.end () && " missing machine model" );
501501 return ProcModels[I->second ];
502502 }
503- const CodeGenProcModel &getProcModel (const Record *ModelDef) const {
504- return const_cast <CodeGenSchedModels *>(this )->getProcModel (ModelDef);
503+ CodeGenProcModel &getProcModel (const Record *ModelDef) {
504+ return const_cast <CodeGenProcModel &>(
505+ static_cast <const CodeGenSchedModels &>(*this ).getProcModel (ModelDef));
505506 }
506507
507508 // Iterate over the unique processor models.
@@ -529,14 +530,14 @@ class CodeGenSchedModels {
529530 const CodeGenSchedRW &getSchedRW (unsigned Idx, bool IsRead) const {
530531 return IsRead ? getSchedRead (Idx) : getSchedWrite (Idx);
531532 }
532- CodeGenSchedRW &getSchedRW (const Record *Def) {
533+ const CodeGenSchedRW &getSchedRW (const Record *Def) const {
533534 bool IsRead = Def->isSubClassOf (" SchedRead" );
534535 unsigned Idx = getSchedRWIdx (Def, IsRead);
535- return const_cast <CodeGenSchedRW &>(IsRead ? getSchedRead (Idx)
536- : getSchedWrite (Idx));
536+ return IsRead ? getSchedRead (Idx) : getSchedWrite (Idx);
537537 }
538- const CodeGenSchedRW &getSchedRW (const Record *Def) const {
539- return const_cast <CodeGenSchedModels &>(*this ).getSchedRW (Def);
538+ CodeGenSchedRW &getSchedRW (const Record *Def) {
539+ return const_cast <CodeGenSchedRW &>(
540+ static_cast <const CodeGenSchedModels &>(*this ).getSchedRW (Def));
540541 }
541542
542543 unsigned getSchedRWIdx (const Record *Def, bool IsRead) const ;
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