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[LFI] Reserve LFI registers
1 parent 9ca2065 commit 2b46bc0

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2 files changed

+12
-0
lines changed

2 files changed

+12
-0
lines changed

llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp

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Original file line numberDiff line numberDiff line change
@@ -461,6 +461,17 @@ AArch64RegisterInfo::getStrictlyReservedRegs(const MachineFunction &MF) const {
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markSuperRegs(Reserved, i);
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}
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if (MF.getSubtarget<AArch64Subtarget>().isLFI()) {
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markSuperRegs(Reserved, AArch64::W28);
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markSuperRegs(Reserved, AArch64::W27);
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markSuperRegs(Reserved, AArch64::W26);
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markSuperRegs(Reserved, AArch64::W25);
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if (!MF.getProperties().hasNoVRegs()) {
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markSuperRegs(Reserved, AArch64::LR);
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markSuperRegs(Reserved, AArch64::W30);
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}
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}
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for (size_t i = 0; i < AArch64::GPR32commonRegClass.getNumRegs(); ++i) {
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if (MF.getSubtarget<AArch64Subtarget>().isXRegisterReserved(i))
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markSuperRegs(Reserved, AArch64::GPR32commonRegClass.getRegister(i));

llvm/lib/Target/AArch64/AArch64Subtarget.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -293,6 +293,7 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo {
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bool isTargetAndroid() const { return TargetTriple.isAndroid(); }
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bool isTargetFuchsia() const { return TargetTriple.isOSFuchsia(); }
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bool isWindowsArm64EC() const { return TargetTriple.isWindowsArm64EC(); }
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bool isLFI() const { return TargetTriple.isLFI(); }
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bool isTargetCOFF() const { return TargetTriple.isOSBinFormatCOFF(); }
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bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }

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