temp

Author: kerbowa

llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp

@@ -520,14 +520,13 @@ bool AMDGPUCallLowering::lowerFormalArgumentsKernel(
 
   // TODO: Align down to dword alignment and extract bits for extending loads.
   for (auto &Arg : F.args()) {
-    // Hidden arguments that are in the kernel signature must be preloded to
-    // user SGPRs, or loaded via the implicit_arg ptr. Print a diagnostic
-    // error if a hidden argument is in the argument list and is not
-    // preloaded.
+    // Hidden arguments that are in the kernel signature must be preloaded to
+    // user SGPRs, or loaded via the implicit_arg ptr. Print a diagnostic error
+    // if a hidden argument is in the argument list and is not preloaded.
     if (Arg.hasAttribute("amdgpu-hidden-argument")) {
       DiagnosticInfoUnsupported NonPreloadHiddenArg(
           *Arg.getParent(),
-          "Hidden argument in kernel signature was not preloaded");
+          "hidden argument in kernel signature was not preloaded");
       F.getContext().diagnose(NonPreloadHiddenArg);
     }
 

llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp

@@ -145,7 +145,7 @@ class PreloadKernelArgInfo {
   // arguments.
   void setInitialFreeUserSGPRsCount() {
     GCNUserSGPRUsageInfo UserSGPRInfo(F, ST);
-    NumFreeUserSGPRs = UserSGPRInfo.getNumFreeKernargPreloadSGPRs();
+    NumFreeUserSGPRs = UserSGPRInfo.getNumFreeUserSGPRs();
   }
 
   bool tryAllocPreloadSGPRs(unsigned AllocSize, uint64_t ArgOffset,
@@ -486,8 +486,8 @@ static bool lowerKernelArguments(Function &F, const TargetMachine &TM) {
     uint64_t ImplicitArgsBaseOffset =
         alignTo(ExplicitArgOffset, ST.getAlignmentForImplicitArgPtr()) +
         BaseOffset;
-    PreloadInfo.tryAllocImplicitArgPreloadSGPRs(ImplicitArgsBaseOffset, ExplicitArgOffset,
-                                                Builder);
+    PreloadInfo.tryAllocImplicitArgPreloadSGPRs(ImplicitArgsBaseOffset,
+                                                ExplicitArgOffset, Builder);
   }
 
   return true;

llvm/lib/Target/AMDGPU/GCNSubtarget.cpp

@@ -748,10 +748,6 @@ GCNUserSGPRUsageInfo::GCNUserSGPRUsageInfo(const Function &F,
     FlatScratchInit = true;
   }
 
-  if (!AMDGPU::isGraphics(CC) && !IsKernel &&
-      !F.hasFnAttribute("amdgpu-no-lds-kernel-id"))
-    LDSKernelId = true;
-
   if (hasImplicitBufferPtr())
     NumUsedUserSGPRs += getNumUserSGPRForField(ImplicitBufferPtrID);
 
@@ -775,9 +771,6 @@ GCNUserSGPRUsageInfo::GCNUserSGPRUsageInfo(const Function &F,
 
   if (hasPrivateSegmentSize())
     NumUsedUserSGPRs += getNumUserSGPRForField(PrivateSegmentSizeID);
-
-  if (hasLDSKernelId())
-    NumSyntheticSGPRs += getNumUserSGPRForField(LDSKernelIdID);
 }
 
 void GCNUserSGPRUsageInfo::allocKernargPreloadSGPRs(unsigned NumSGPRs) {
@@ -786,6 +779,6 @@ void GCNUserSGPRUsageInfo::allocKernargPreloadSGPRs(unsigned NumSGPRs) {
   NumUsedUserSGPRs += NumSGPRs;
 }
 
-unsigned GCNUserSGPRUsageInfo::getNumFreeKernargPreloadSGPRs() {
-  return AMDGPU::getMaxNumUserSGPRs(ST) - (NumUsedUserSGPRs + NumSyntheticSGPRs);
+unsigned GCNUserSGPRUsageInfo::getNumFreeUserSGPRs() {
+  return AMDGPU::getMaxNumUserSGPRs(ST) - NumUsedUserSGPRs;
 }

llvm/lib/Target/AMDGPU/GCNSubtarget.h

@@ -1678,13 +1678,11 @@ class GCNUserSGPRUsageInfo {
 
   bool hasPrivateSegmentSize() const { return PrivateSegmentSize; }
 
-  bool hasLDSKernelId() const { return LDSKernelId; }
-
   unsigned getNumKernargPreloadSGPRs() const { return NumKernargPreloadSGPRs; }
 
   unsigned getNumUsedUserSGPRs() const { return NumUsedUserSGPRs; }
 
-  unsigned getNumFreeKernargPreloadSGPRs();
+  unsigned getNumFreeUserSGPRs();
 
   void allocKernargPreloadSGPRs(unsigned NumSGPRs);
 
@@ -1696,12 +1694,11 @@ class GCNUserSGPRUsageInfo {
     KernargSegmentPtrID = 4,
     DispatchIdID = 5,
     FlatScratchInitID = 6,
-    PrivateSegmentSizeID = 7,
-    LDSKernelIdID = 8
+    PrivateSegmentSizeID = 7
   };
 
   // Returns the size in number of SGPRs for preload user SGPR field.
-  static constexpr unsigned getNumUserSGPRForField(UserSGPRID ID) {
+  static unsigned getNumUserSGPRForField(UserSGPRID ID) {
     switch (ID) {
     case ImplicitBufferPtrID:
       return 2;
@@ -1719,8 +1716,6 @@ class GCNUserSGPRUsageInfo {
       return 2;
     case PrivateSegmentSizeID:
       return 1;
-    case LDSKernelIdID:
-      return 1;
     }
     llvm_unreachable("Unknown UserSGPRID.");
   }
@@ -1749,13 +1744,9 @@ class GCNUserSGPRUsageInfo {
 
   bool PrivateSegmentSize = false;
 
-  bool LDSKernelId = false;
-
   unsigned NumKernargPreloadSGPRs = 0;
 
   unsigned NumUsedUserSGPRs = 0;
-
-  unsigned NumSyntheticSGPRs = 0;
 };
 
 } // end namespace llvm

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

@@ -2422,7 +2422,7 @@ void SITargetLowering::allocateSpecialInputSGPRs(
   if (Info.hasWorkGroupIDZ())
     allocateSGPR32Input(CCInfo, ArgInfo.WorkGroupIDZ);
 
-  if (UserSGPRInfo.hasLDSKernelId())
+  if (Info.hasLDSKernelId())
     allocateSGPR32Input(CCInfo, ArgInfo.LDSKernelId);
 }
 
@@ -2545,8 +2545,7 @@ void SITargetLowering::allocatePreloadKernArgSGPRs(
       unsigned Padding = ArgOffset - LastExplicitArgOffset;
       unsigned PaddingSGPRs = alignTo(Padding, 4) / 4;
       // Check for free user SGPRs for preloading.
-      if (PaddingSGPRs + NumAllocSGPRs >
-          SGPRInfo.getNumFreeKernargPreloadSGPRs()) {
+      if (PaddingSGPRs + NumAllocSGPRs > SGPRInfo.getNumFreeUserSGPRs()) {
         InPreloadSequence = false;
         break;
       }
@@ -2574,8 +2573,7 @@ void SITargetLowering::allocateLDSKernelId(CCState &CCInfo, MachineFunction &MF,
                                            const SIRegisterInfo &TRI,
                                            SIMachineFunctionInfo &Info) const {
   // Always allocate this last since it is a synthetic preload.
-  const GCNUserSGPRUsageInfo &UserSGPRInfo = Info.getUserSGPRInfo();
-  if (UserSGPRInfo.hasLDSKernelId()) {
+  if (Info.hasLDSKernelId()) {
     Register Reg = Info.addLDSKernelId();
     MF.addLiveIn(Reg, &AMDGPU::SGPR_32RegClass);
     CCInfo.AllocateReg(Reg);
@@ -2825,7 +2823,7 @@ SDValue SITargetLowering::LowerFormalArguments(
     const GCNUserSGPRUsageInfo &UserSGPRInfo = Info->getUserSGPRInfo();
     assert(!UserSGPRInfo.hasDispatchPtr() &&
            !UserSGPRInfo.hasKernargSegmentPtr() && !Info->hasWorkGroupInfo() &&
-           !UserSGPRInfo.hasLDSKernelId() && !Info->hasWorkItemIDX() &&
+           !Info->hasLDSKernelId() && !Info->hasWorkItemIDX() &&
            !Info->hasWorkItemIDY() && !Info->hasWorkItemIDZ());
     (void)UserSGPRInfo;
     if (!Subtarget->enableFlatScratch())
@@ -3025,16 +3023,16 @@ SDValue SITargetLowering::LowerFormalArguments(
           NewArg = DAG.getMergeValues({NewArg, Chain}, DL);
         }
       } else {
-        // Hidden arguments that are in the kernel signature must be preloded to
-        // user SGPRs, or loaded via the implicit_arg ptr. Print a diagnostic
+        // Hidden arguments that are in the kernel signature must be preloaded
+        // to user SGPRs, or loaded via the implicit_arg ptr. Print a diagnostic
         // error if a hidden argument is in the argument list and is not
         // preloaded.
         if (Arg.isOrigArg()) {
           Argument *OrigArg = Fn.getArg(Arg.getOrigArgIndex());
           if (OrigArg->hasAttribute("amdgpu-hidden-argument")) {
             DiagnosticInfoUnsupported NonPreloadHiddenArg(
                 *OrigArg->getParent(),
-                "Hidden argument in kernel signature was not preloaded",
+                "hidden argument in kernel signature was not preloaded",
                 DL.getDebugLoc());
             DAG.getContext()->diagnose(NonPreloadHiddenArg);
           }

llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp

@@ -38,7 +38,7 @@ SIMachineFunctionInfo::SIMachineFunctionInfo(const Function &F,
                                              const GCNSubtarget *STI)
     : AMDGPUMachineFunction(F, *STI), Mode(F, *STI), GWSResourcePSV(getTM(STI)),
       UserSGPRInfo(F, *STI), WorkGroupIDX(false), WorkGroupIDY(false),
-      WorkGroupIDZ(false), WorkGroupInfo(false),
+      WorkGroupIDZ(false), WorkGroupInfo(false), LDSKernelId(false),
       PrivateSegmentWaveByteOffset(false), WorkItemIDX(false),
       WorkItemIDY(false), WorkItemIDZ(false), ImplicitArgPtr(false),
       GITPtrHigh(0xffffffff), HighBitsOf32BitAddress(0) {
@@ -131,6 +131,9 @@ SIMachineFunctionInfo::SIMachineFunctionInfo(const Function &F,
     if (!F.hasFnAttribute("amdgpu-no-workitem-id-z") &&
         ST.getMaxWorkitemID(F, 2) != 0)
       WorkItemIDZ = true;
+
+    if (!IsKernel && !F.hasFnAttribute("amdgpu-no-lds-kernel-id"))
+      LDSKernelId = true;
   }
 
   if (isEntryFunction()) {

llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h

@@ -461,6 +461,7 @@ class SIMachineFunctionInfo final : public AMDGPUMachineFunction,
   bool WorkGroupIDY : 1;
   bool WorkGroupIDZ : 1;
   bool WorkGroupInfo : 1;
+  bool LDSKernelId : 1;
   bool PrivateSegmentWaveByteOffset : 1;
 
   bool WorkItemIDX : 1; // Always initialized.
@@ -821,6 +822,8 @@ class SIMachineFunctionInfo final : public AMDGPUMachineFunction,
     return ArgInfo.WorkGroupInfo.getRegister();
   }
 
+  bool hasLDSKernelId() const { return LDSKernelId; }
+
   // Add special VGPR inputs
   void setWorkItemIDX(ArgDescriptor Arg) {
     ArgInfo.WorkItemIDX = Arg;

llvm/test/CodeGen/AMDGPU/invalid-hidden-kernarg-in-kernel-signature.ll

@@ -1,14 +1,14 @@
-; RUN: not llc -global-isel=1 -mtriple=amdgcn--amdhsa -mcpu=gfx940 -start-after=amdgpu-lower-kernel-arguments < %s 2>&1 | FileCheck -check-prefix=ERROR %s
-; RUN: not llc -global-isel=0 -mtriple=amdgcn--amdhsa -mcpu=gfx940 -start-after=amdgpu-lower-kernel-arguments < %s 2>&1 | FileCheck -check-prefix=ERROR %s
+; RUN: not llc -global-isel=1 -mtriple=amdgcn--amdhsa -mcpu=gfx940 < %s 2>&1 | FileCheck -check-prefix=ERROR %s
+; RUN: not llc -global-isel=0 -mtriple=amdgcn--amdhsa -mcpu=gfx940 < %s 2>&1 | FileCheck -check-prefix=ERROR %s
 
 define amdgpu_kernel void @no_free_sgprs_block_count_x_no_preload_diag(ptr addrspace(1) inreg %out, i512 inreg, i32 inreg "amdgpu-hidden-argument" %_hidden_block_count_x) #0 {
-; ERROR: error: <unknown>:0:0: in function no_free_sgprs_block_count_x_no_preload_diag void (ptr addrspace(1), i512, i32): Hidden argument in kernel signature was not preloaded
+; ERROR: error: <unknown>:0:0: in function no_free_sgprs_block_count_x_no_preload_diag void (ptr addrspace(1), i512, i32): hidden argument in kernel signature was not preloaded
   store i32 %_hidden_block_count_x, ptr addrspace(1) %out
   ret void
 }
 
 define amdgpu_kernel void @preloadremainder_z_no_preload_diag(ptr addrspace(1) inreg %out, i256 inreg, i32 inreg "amdgpu-hidden-argument" %_hidden_block_count_x, i32 inreg "amdgpu-hidden-argument" %_hidden_block_count_y, i32 inreg "amdgpu-hidden-argument" %_hidden_block_count_z, i16 inreg "amdgpu-hidden-argument" %_hidden_group_size_x, i16 inreg "amdgpu-hidden-argument" %_hidden_group_size_y, i16 inreg "amdgpu-hidden-argument" %_hidden_group_size_z, i16 inreg "amdgpu-hidden-argument" %_hidden_remainder_x, i16 inreg "amdgpu-hidden-argument" %_hidden_remainder_y, i16 inreg "amdgpu-hidden-argument" %_hidden_remainder_z) #0 {
-; ERROR: error: <unknown>:0:0: in function preloadremainder_z_no_preload_diag void (ptr addrspace(1), i256, i32, i32, i32, i16, i16, i16, i16, i16, i16): Hidden argument in kernel signature was not preloaded
+; ERROR: error: <unknown>:0:0: in function preloadremainder_z_no_preload_diag void (ptr addrspace(1), i256, i32, i32, i32, i16, i16, i16, i16, i16, i16): hidden argument in kernel signature was not preloaded
   %conv = zext i16 %_hidden_remainder_z to i32
   store i32 %conv, ptr addrspace(1) %out
   ret void