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refactor the program
1 parent 42ba900 commit 2c34546

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4 files changed

+35
-7
lines changed

4 files changed

+35
-7
lines changed

llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -73,7 +73,7 @@ void SPIRVInstPrinter::printOpConstantVarOps(const MCInst *MI,
7373
// Handle float constants (OpConstantF)
7474
uint64_t Imm = MI->getOperand(StartIndex).getImm();
7575
if (NumVarOps == 2) {
76-
Imm |= (MI->getOperand(StartIndex + 1).getImm()) << 32;
76+
Imm |= (MI->getOperand(StartIndex + 1).getImm() << 32);
7777
}
7878

7979
// For 16-bit floats, print as integer

llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp

Lines changed: 24 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -343,6 +343,20 @@ Register SPIRVGlobalRegistry::createConstFP(const ConstantFP *CF,
343343
return Res;
344344
}
345345

346+
Register SPIRVGlobalRegistry::getOrCreateConstInt(APInt Val, MachineInstr &I,
347+
SPIRVType *SpvType,
348+
const SPIRVInstrInfo &TII,
349+
bool ZeroAsNull) {
350+
const IntegerType *Ty = cast<IntegerType>(getTypeForSPIRVType(SpvType));
351+
auto *const CI = ConstantInt::get(const_cast<IntegerType *>(Ty), Val);
352+
const MachineInstr *MI = findMI(CI, CurMF);
353+
if (MI && (MI->getOpcode() == SPIRV::OpConstantNull ||
354+
MI->getOpcode() == SPIRV::OpConstantI))
355+
return MI->getOperand(0).getReg();
356+
return createConstInt(CI, I, SpvType, TII, ZeroAsNull);
357+
LLVMContext &Ctx = CurMF->getFunction().getContext();
358+
}
359+
346360
Register SPIRVGlobalRegistry::getOrCreateConstInt(uint64_t Val, MachineInstr &I,
347361
SPIRVType *SpvType,
348362
const SPIRVInstrInfo &TII,
@@ -354,9 +368,10 @@ Register SPIRVGlobalRegistry::getOrCreateConstInt(uint64_t Val, MachineInstr &I,
354368
MI->getOpcode() == SPIRV::OpConstantI))
355369
return MI->getOperand(0).getReg();
356370
return createConstInt(CI, I, SpvType, TII, ZeroAsNull);
371+
LLVMContext &Ctx = CurMF->getFunction().getContext();
357372
}
358373

359-
Register SPIRVGlobalRegistry::createConstInt(const ConstantInt *CI,
374+
Register SPIRVGlobalRegistry::createConstInt(const Constant *CI,
360375
MachineInstr &I,
361376
SPIRVType *SpvType,
362377
const SPIRVInstrInfo &TII,
@@ -374,15 +389,20 @@ Register SPIRVGlobalRegistry::createConstInt(const ConstantInt *CI,
374389
MachineInstrBuilder MIB;
375390
if (BitWidth == 1) {
376391
MIB = MIRBuilder
377-
.buildInstr(CI->isZero() ? SPIRV::OpConstantFalse
392+
.buildInstr(CI->isZeroValue() ? SPIRV::OpConstantFalse
378393
: SPIRV::OpConstantTrue)
379394
.addDef(Res)
380395
.addUse(getSPIRVTypeID(SpvType));
381-
} else if (!CI->isZero() || !ZeroAsNull) {
396+
} else if (!CI->isZeroValue() || !ZeroAsNull) {
382397
MIB = MIRBuilder.buildInstr(SPIRV::OpConstantI)
383398
.addDef(Res)
384399
.addUse(getSPIRVTypeID(SpvType));
385-
addNumImm(APInt(BitWidth, CI->getZExtValue()), MIB);
400+
if (BitWidth <= 64) {
401+
const ConstantInt *CII = dyn_cast<ConstantInt>(CI);
402+
addNumImm(APInt(BitWidth, CII->getZExtValue()), MIB);
403+
} else {
404+
addNumImm(CI->getUniqueInteger(), MIB);
405+
}
386406
} else {
387407
MIB = MIRBuilder.buildInstr(SPIRV::OpConstantNull)
388408
.addDef(Res)

llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -515,10 +515,13 @@ class SPIRVGlobalRegistry : public SPIRVIRMapping {
515515
Register buildConstantInt(uint64_t Val, MachineIRBuilder &MIRBuilder,
516516
SPIRVType *SpvType, bool EmitIR,
517517
bool ZeroAsNull = true);
518+
Register getOrCreateConstInt(APInt Val, MachineInstr &I,
519+
SPIRVType *SpvType, const SPIRVInstrInfo &TII,
520+
bool ZeroAsNull = true);
518521
Register getOrCreateConstInt(uint64_t Val, MachineInstr &I,
519522
SPIRVType *SpvType, const SPIRVInstrInfo &TII,
520523
bool ZeroAsNull = true);
521-
Register createConstInt(const ConstantInt *CI, MachineInstr &I,
524+
Register createConstInt(const Constant *CI, MachineInstr &I,
522525
SPIRVType *SpvType, const SPIRVInstrInfo &TII,
523526
bool ZeroAsNull);
524527
Register getOrCreateConstFP(APFloat Val, MachineInstr &I, SPIRVType *SpvType,

llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2939,8 +2939,13 @@ bool SPIRVInstructionSelector::selectConst(Register ResVReg,
29392939
Reg = GR.getOrCreateConstFP(I.getOperand(1).getFPImm()->getValue(), I,
29402940
ResType, TII, !STI.isShader());
29412941
} else {
2942-
Reg = GR.getOrCreateConstInt(I.getOperand(1).getCImm()->getZExtValue(), I
2942+
if(GR.getScalarOrVectorBitWidth(ResType) <= 64) {
2943+
Reg = GR.getOrCreateConstInt(I.getOperand(1).getCImm()->getZExtValue(), I,
29432944
ResType, TII, !STI.isShader());
2945+
} else {
2946+
Reg = GR.getOrCreateConstInt(I.getOperand(1).getCImm()->getValue(), I,
2947+
ResType, TII, !STI.isShader());
2948+
}
29442949
}
29452950
return Reg == ResVReg ? true : BuildCOPY(ResVReg, Reg, I);
29462951
}

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