@@ -343,6 +343,20 @@ Register SPIRVGlobalRegistry::createConstFP(const ConstantFP *CF,
343343 return Res;
344344}
345345
346+ Register SPIRVGlobalRegistry::getOrCreateConstInt (APInt Val, MachineInstr &I,
347+ SPIRVType *SpvType,
348+ const SPIRVInstrInfo &TII,
349+ bool ZeroAsNull) {
350+ const IntegerType *Ty = cast<IntegerType>(getTypeForSPIRVType (SpvType));
351+ auto *const CI = ConstantInt::get (const_cast <IntegerType *>(Ty), Val);
352+ const MachineInstr *MI = findMI (CI, CurMF);
353+ if (MI && (MI->getOpcode () == SPIRV::OpConstantNull ||
354+ MI->getOpcode () == SPIRV::OpConstantI))
355+ return MI->getOperand (0 ).getReg ();
356+ return createConstInt (CI, I, SpvType, TII, ZeroAsNull);
357+ LLVMContext &Ctx = CurMF->getFunction ().getContext ();
358+ }
359+
346360Register SPIRVGlobalRegistry::getOrCreateConstInt (uint64_t Val, MachineInstr &I,
347361 SPIRVType *SpvType,
348362 const SPIRVInstrInfo &TII,
@@ -354,9 +368,10 @@ Register SPIRVGlobalRegistry::getOrCreateConstInt(uint64_t Val, MachineInstr &I,
354368 MI->getOpcode () == SPIRV::OpConstantI))
355369 return MI->getOperand (0 ).getReg ();
356370 return createConstInt (CI, I, SpvType, TII, ZeroAsNull);
371+ LLVMContext &Ctx = CurMF->getFunction ().getContext ();
357372}
358373
359- Register SPIRVGlobalRegistry::createConstInt (const ConstantInt *CI,
374+ Register SPIRVGlobalRegistry::createConstInt (const Constant *CI,
360375 MachineInstr &I,
361376 SPIRVType *SpvType,
362377 const SPIRVInstrInfo &TII,
@@ -374,15 +389,20 @@ Register SPIRVGlobalRegistry::createConstInt(const ConstantInt *CI,
374389 MachineInstrBuilder MIB;
375390 if (BitWidth == 1 ) {
376391 MIB = MIRBuilder
377- .buildInstr (CI->isZero () ? SPIRV::OpConstantFalse
392+ .buildInstr (CI->isZeroValue () ? SPIRV::OpConstantFalse
378393 : SPIRV::OpConstantTrue)
379394 .addDef (Res)
380395 .addUse (getSPIRVTypeID (SpvType));
381- } else if (!CI->isZero () || !ZeroAsNull) {
396+ } else if (!CI->isZeroValue () || !ZeroAsNull) {
382397 MIB = MIRBuilder.buildInstr (SPIRV::OpConstantI)
383398 .addDef (Res)
384399 .addUse (getSPIRVTypeID (SpvType));
385- addNumImm (APInt (BitWidth, CI->getZExtValue ()), MIB);
400+ if (BitWidth <= 64 ) {
401+ const ConstantInt *CII = dyn_cast<ConstantInt>(CI);
402+ addNumImm (APInt (BitWidth, CII->getZExtValue ()), MIB);
403+ } else {
404+ addNumImm (CI->getUniqueInteger (), MIB);
405+ }
386406 } else {
387407 MIB = MIRBuilder.buildInstr (SPIRV::OpConstantNull)
388408 .addDef (Res)
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