Autogenerate checks for merge-vectors.ll

Author: gandhi56

llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-vectors.ll

@@ -1,12 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
 ; RUN: opt -mtriple=amdgcn-amd-amdhsa -passes=load-store-vectorizer -mattr=+relaxed-buffer-oob-mode -S -o - %s | FileCheck --check-prefixes=CHECK,CHECK-OOB-RELAXED %s
 ; RUN: opt -mtriple=amdgcn-amd-amdhsa -passes=load-store-vectorizer -S -o - %s | FileCheck --check-prefixes=CHECK,CHECK-OOB-STRICT %s
 
 target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-ni:7"
 
-; CHECK-LABEL: @merge_v2i32_v2i32(
-; CHECK: load <4 x i32>
-; CHECK: store <4 x i32> zeroinitializer
 define amdgpu_kernel void @merge_v2i32_v2i32(ptr addrspace(1) nocapture %a, ptr addrspace(1) nocapture readonly %b) #0 {
+; CHECK-LABEL: define amdgpu_kernel void @merge_v2i32_v2i32(
+; CHECK-SAME: ptr addrspace(1) captures(none) [[A:%.*]], ptr addrspace(1) readonly captures(none) [[B:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[TMP0:%.*]] = load <4 x i32>, ptr addrspace(1) [[B]], align 4
+; CHECK-NEXT:    [[LD_C1:%.*]] = shufflevector <4 x i32> [[TMP0]], <4 x i32> poison, <2 x i32> <i32 0, i32 1>
+; CHECK-NEXT:    [[LD_C_IDX_12:%.*]] = shufflevector <4 x i32> [[TMP0]], <4 x i32> poison, <2 x i32> <i32 2, i32 3>
+; CHECK-NEXT:    store <4 x i32> zeroinitializer, ptr addrspace(1) [[A]], align 4
+; CHECK-NEXT:    ret void
+;
 entry:
   %a.1 = getelementptr inbounds <2 x i32>, ptr addrspace(1) %a, i64 1
   %b.1 = getelementptr inbounds <2 x i32>, ptr addrspace(1) %b, i64 1
@@ -20,10 +27,16 @@ entry:
   ret void
 }
 
-; CHECK-LABEL: @merge_v1i32_v1i32(
-; CHECK: load <2 x i32>
-; CHECK: store <2 x i32> zeroinitializer
 define amdgpu_kernel void @merge_v1i32_v1i32(ptr addrspace(1) nocapture %a, ptr addrspace(1) nocapture readonly %b) #0 {
+; CHECK-LABEL: define amdgpu_kernel void @merge_v1i32_v1i32(
+; CHECK-SAME: ptr addrspace(1) captures(none) [[A:%.*]], ptr addrspace(1) readonly captures(none) [[B:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[TMP0:%.*]] = load <2 x i32>, ptr addrspace(1) [[B]], align 4
+; CHECK-NEXT:    [[LD_C1:%.*]] = shufflevector <2 x i32> [[TMP0]], <2 x i32> poison, <1 x i32> zeroinitializer
+; CHECK-NEXT:    [[LD_C_IDX_12:%.*]] = shufflevector <2 x i32> [[TMP0]], <2 x i32> poison, <1 x i32> <i32 1>
+; CHECK-NEXT:    store <2 x i32> zeroinitializer, ptr addrspace(1) [[A]], align 4
+; CHECK-NEXT:    ret void
+;
 entry:
   %a.1 = getelementptr inbounds <1 x i32>, ptr addrspace(1) %a, i64 1
   %b.1 = getelementptr inbounds <1 x i32>, ptr addrspace(1) %b, i64 1
@@ -37,12 +50,18 @@ entry:
   ret void
 }
 
-; CHECK-LABEL: @no_merge_v3i32_v3i32(
-; CHECK: load <3 x i32>
-; CHECK: load <3 x i32>
-; CHECK: store <3 x i32> zeroinitializer
-; CHECK: store <3 x i32> zeroinitializer
 define amdgpu_kernel void @no_merge_v3i32_v3i32(ptr addrspace(1) nocapture %a, ptr addrspace(1) nocapture readonly %b) #0 {
+; CHECK-LABEL: define amdgpu_kernel void @no_merge_v3i32_v3i32(
+; CHECK-SAME: ptr addrspace(1) captures(none) [[A:%.*]], ptr addrspace(1) readonly captures(none) [[B:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[A_1:%.*]] = getelementptr inbounds <3 x i32>, ptr addrspace(1) [[A]], i64 1
+; CHECK-NEXT:    [[B_1:%.*]] = getelementptr inbounds <3 x i32>, ptr addrspace(1) [[B]], i64 1
+; CHECK-NEXT:    [[LD_C:%.*]] = load <3 x i32>, ptr addrspace(1) [[B]], align 4
+; CHECK-NEXT:    [[LD_C_IDX_1:%.*]] = load <3 x i32>, ptr addrspace(1) [[B_1]], align 4
+; CHECK-NEXT:    store <3 x i32> zeroinitializer, ptr addrspace(1) [[A]], align 4
+; CHECK-NEXT:    store <3 x i32> zeroinitializer, ptr addrspace(1) [[A_1]], align 4
+; CHECK-NEXT:    ret void
+;
 entry:
   %a.1 = getelementptr inbounds <3 x i32>, ptr addrspace(1) %a, i64 1
   %b.1 = getelementptr inbounds <3 x i32>, ptr addrspace(1) %b, i64 1
@@ -56,10 +75,16 @@ entry:
   ret void
 }
 
-; CHECK-LABEL: @merge_v2i16_v2i16(
-; CHECK: load <4 x i16>
-; CHECK: store <4 x i16> zeroinitializer
 define amdgpu_kernel void @merge_v2i16_v2i16(ptr addrspace(1) nocapture %a, ptr addrspace(1) nocapture readonly %b) #0 {
+; CHECK-LABEL: define amdgpu_kernel void @merge_v2i16_v2i16(
+; CHECK-SAME: ptr addrspace(1) captures(none) [[A:%.*]], ptr addrspace(1) readonly captures(none) [[B:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[TMP0:%.*]] = load <4 x i16>, ptr addrspace(1) [[B]], align 4
+; CHECK-NEXT:    [[LD_C1:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> poison, <2 x i32> <i32 0, i32 1>
+; CHECK-NEXT:    [[LD_C_IDX_12:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> poison, <2 x i32> <i32 2, i32 3>
+; CHECK-NEXT:    store <4 x i16> zeroinitializer, ptr addrspace(1) [[A]], align 4
+; CHECK-NEXT:    ret void
+;
 entry:
   %a.1 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %a, i64 1
   %b.1 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %b, i64 1
@@ -73,15 +98,27 @@ entry:
   ret void
 }
 
-; CHECK-OOB-RELAXED-LABEL: @merge_fat_ptrs(
-; CHECK-OOB-RELAXED: load <4 x i16>
-; CHECK-OOB-RELAXED: store <4 x i16> zeroinitializer
-; CHECK-OOB-STRICT-LABEL: @merge_fat_ptrs(
-; CHECK-OOB-STRICT: load <2 x i16>
-; CHECK-OOB-STRICT: load <2 x i16>
-; CHECK-OOB-STRICT: store <2 x i16> zeroinitializer
-; CHECK-OOB-STRICT: store <2 x i16> zeroinitializer
 define amdgpu_kernel void @merge_fat_ptrs(ptr addrspace(7) nocapture %a, ptr addrspace(7) nocapture readonly %b) #0 {
+; CHECK-OOB-RELAXED-LABEL: define amdgpu_kernel void @merge_fat_ptrs(
+; CHECK-OOB-RELAXED-SAME: ptr addrspace(7) captures(none) [[A:%.*]], ptr addrspace(7) readonly captures(none) [[B:%.*]]) #[[ATTR0]] {
+; CHECK-OOB-RELAXED-NEXT:  [[ENTRY:.*:]]
+; CHECK-OOB-RELAXED-NEXT:    [[TMP0:%.*]] = load <4 x i16>, ptr addrspace(7) [[B]], align 4
+; CHECK-OOB-RELAXED-NEXT:    [[LD_C1:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> poison, <2 x i32> <i32 0, i32 1>
+; CHECK-OOB-RELAXED-NEXT:    [[LD_C_IDX_12:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> poison, <2 x i32> <i32 2, i32 3>
+; CHECK-OOB-RELAXED-NEXT:    store <4 x i16> zeroinitializer, ptr addrspace(7) [[A]], align 4
+; CHECK-OOB-RELAXED-NEXT:    ret void
+;
+; CHECK-OOB-STRICT-LABEL: define amdgpu_kernel void @merge_fat_ptrs(
+; CHECK-OOB-STRICT-SAME: ptr addrspace(7) captures(none) [[A:%.*]], ptr addrspace(7) readonly captures(none) [[B:%.*]]) #[[ATTR0]] {
+; CHECK-OOB-STRICT-NEXT:  [[ENTRY:.*:]]
+; CHECK-OOB-STRICT-NEXT:    [[A_1:%.*]] = getelementptr inbounds <2 x i16>, ptr addrspace(7) [[A]], i32 1
+; CHECK-OOB-STRICT-NEXT:    [[B_1:%.*]] = getelementptr inbounds <2 x i16>, ptr addrspace(7) [[B]], i32 1
+; CHECK-OOB-STRICT-NEXT:    [[LD_C:%.*]] = load <2 x i16>, ptr addrspace(7) [[B]], align 4
+; CHECK-OOB-STRICT-NEXT:    [[LD_C_IDX_1:%.*]] = load <2 x i16>, ptr addrspace(7) [[B_1]], align 4
+; CHECK-OOB-STRICT-NEXT:    store <2 x i16> zeroinitializer, ptr addrspace(7) [[A]], align 4
+; CHECK-OOB-STRICT-NEXT:    store <2 x i16> zeroinitializer, ptr addrspace(7) [[A_1]], align 4
+; CHECK-OOB-STRICT-NEXT:    ret void
+;
 entry:
   %a.1 = getelementptr inbounds <2 x i16>, ptr addrspace(7) %a, i32 1
   %b.1 = getelementptr inbounds <2 x i16>, ptr addrspace(7) %b, i32 1
@@ -95,11 +132,16 @@ entry:
   ret void
 }
 
-; CHECK-LABEL: @merge_load_i32_v2i16(
-; CHECK: load <2 x i32>
-; CHECK: extractelement <2 x i32> %0, i32 0
-; CHECK: extractelement <2 x i32> %0, i32 1
 define amdgpu_kernel void @merge_load_i32_v2i16(ptr addrspace(1) nocapture %a) #0 {
+; CHECK-LABEL: define amdgpu_kernel void @merge_load_i32_v2i16(
+; CHECK-SAME: ptr addrspace(1) captures(none) [[A:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[TMP0:%.*]] = load <2 x i32>, ptr addrspace(1) [[A]], align 4
+; CHECK-NEXT:    [[LD_01:%.*]] = extractelement <2 x i32> [[TMP0]], i32 0
+; CHECK-NEXT:    [[TMP1:%.*]] = extractelement <2 x i32> [[TMP0]], i32 1
+; CHECK-NEXT:    [[DOTCAST:%.*]] = bitcast i32 [[TMP1]] to <2 x i16>
+; CHECK-NEXT:    ret void
+;
 entry:
   %a.1 = getelementptr inbounds i32, ptr addrspace(1) %a, i32 1
 
@@ -112,11 +154,56 @@ entry:
 attributes #0 = { nounwind }
 attributes #1 = { nounwind readnone }
 
-; CHECK-LABEL: @merge_i32_2i16_float_4i8(
-; CHECK: load <4 x i32>
-; CHECK: store <2 x i32>
-; CHECK: store <2 x i32>
+
 define void @merge_i32_2i16_float_4i8(ptr addrspace(1) %ptr1, ptr addrspace(2) %ptr2) {
+; CHECK-OOB-RELAXED-LABEL: define void @merge_i32_2i16_float_4i8(
+; CHECK-OOB-RELAXED-SAME: ptr addrspace(1) [[PTR1:%.*]], ptr addrspace(2) [[PTR2:%.*]]) #[[ATTR1:[0-9]+]] {
+; CHECK-OOB-RELAXED-NEXT:    [[GEP1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[PTR1]], i64 0
+; CHECK-OOB-RELAXED-NEXT:    [[TMP1:%.*]] = load <4 x i32>, ptr addrspace(1) [[GEP1]], align 4
+; CHECK-OOB-RELAXED-NEXT:    [[LOAD12:%.*]] = extractelement <4 x i32> [[TMP1]], i32 0
+; CHECK-OOB-RELAXED-NEXT:    [[TMP2:%.*]] = extractelement <4 x i32> [[TMP1]], i32 1
+; CHECK-OOB-RELAXED-NEXT:    [[LOAD33:%.*]] = extractelement <4 x i32> [[TMP1]], i32 2
+; CHECK-OOB-RELAXED-NEXT:    [[TMP3:%.*]] = bitcast i32 [[LOAD33]] to float
+; CHECK-OOB-RELAXED-NEXT:    [[TMP4:%.*]] = extractelement <4 x i32> [[TMP1]], i32 3
+; CHECK-OOB-RELAXED-NEXT:    [[DOTCAST:%.*]] = bitcast i32 [[TMP2]] to <2 x i16>
+; CHECK-OOB-RELAXED-NEXT:    [[DOTCAST1:%.*]] = bitcast i32 [[TMP4]] to <4 x i8>
+; CHECK-OOB-RELAXED-NEXT:    [[STORE_GEP1:%.*]] = getelementptr inbounds i32, ptr addrspace(2) [[PTR2]], i64 0
+; CHECK-OOB-RELAXED-NEXT:    [[DOTCAST_CAST:%.*]] = bitcast <2 x i16> [[DOTCAST]] to i32
+; CHECK-OOB-RELAXED-NEXT:    [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[LOAD12]], i32 0
+; CHECK-OOB-RELAXED-NEXT:    [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[DOTCAST_CAST]], i32 1
+; CHECK-OOB-RELAXED-NEXT:    store <2 x i32> [[TMP6]], ptr addrspace(2) [[STORE_GEP1]], align 4
+; CHECK-OOB-RELAXED-NEXT:    [[STORE_GEP3:%.*]] = getelementptr inbounds float, ptr addrspace(2) [[PTR2]], i64 2
+; CHECK-OOB-RELAXED-NEXT:    [[DOTCAST1_CAST:%.*]] = bitcast <4 x i8> [[DOTCAST1]] to i32
+; CHECK-OOB-RELAXED-NEXT:    [[TMP7:%.*]] = bitcast float [[TMP3]] to i32
+; CHECK-OOB-RELAXED-NEXT:    [[TMP8:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i32 0
+; CHECK-OOB-RELAXED-NEXT:    [[TMP9:%.*]] = insertelement <2 x i32> [[TMP8]], i32 [[DOTCAST1_CAST]], i32 1
+; CHECK-OOB-RELAXED-NEXT:    store <2 x i32> [[TMP9]], ptr addrspace(2) [[STORE_GEP3]], align 4
+; CHECK-OOB-RELAXED-NEXT:    ret void
+;
+; CHECK-OOB-STRICT-LABEL: define void @merge_i32_2i16_float_4i8(
+; CHECK-OOB-STRICT-SAME: ptr addrspace(1) [[PTR1:%.*]], ptr addrspace(2) [[PTR2:%.*]]) {
+; CHECK-OOB-STRICT-NEXT:    [[GEP1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[PTR1]], i64 0
+; CHECK-OOB-STRICT-NEXT:    [[TMP1:%.*]] = load <4 x i32>, ptr addrspace(1) [[GEP1]], align 4
+; CHECK-OOB-STRICT-NEXT:    [[LOAD12:%.*]] = extractelement <4 x i32> [[TMP1]], i32 0
+; CHECK-OOB-STRICT-NEXT:    [[TMP2:%.*]] = extractelement <4 x i32> [[TMP1]], i32 1
+; CHECK-OOB-STRICT-NEXT:    [[LOAD33:%.*]] = extractelement <4 x i32> [[TMP1]], i32 2
+; CHECK-OOB-STRICT-NEXT:    [[TMP3:%.*]] = bitcast i32 [[LOAD33]] to float
+; CHECK-OOB-STRICT-NEXT:    [[TMP4:%.*]] = extractelement <4 x i32> [[TMP1]], i32 3
+; CHECK-OOB-STRICT-NEXT:    [[DOTCAST:%.*]] = bitcast i32 [[TMP2]] to <2 x i16>
+; CHECK-OOB-STRICT-NEXT:    [[DOTCAST1:%.*]] = bitcast i32 [[TMP4]] to <4 x i8>
+; CHECK-OOB-STRICT-NEXT:    [[STORE_GEP1:%.*]] = getelementptr inbounds i32, ptr addrspace(2) [[PTR2]], i64 0
+; CHECK-OOB-STRICT-NEXT:    [[DOTCAST_CAST:%.*]] = bitcast <2 x i16> [[DOTCAST]] to i32
+; CHECK-OOB-STRICT-NEXT:    [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[LOAD12]], i32 0
+; CHECK-OOB-STRICT-NEXT:    [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[DOTCAST_CAST]], i32 1
+; CHECK-OOB-STRICT-NEXT:    store <2 x i32> [[TMP6]], ptr addrspace(2) [[STORE_GEP1]], align 4
+; CHECK-OOB-STRICT-NEXT:    [[STORE_GEP3:%.*]] = getelementptr inbounds float, ptr addrspace(2) [[PTR2]], i64 2
+; CHECK-OOB-STRICT-NEXT:    [[DOTCAST1_CAST:%.*]] = bitcast <4 x i8> [[DOTCAST1]] to i32
+; CHECK-OOB-STRICT-NEXT:    [[TMP7:%.*]] = bitcast float [[TMP3]] to i32
+; CHECK-OOB-STRICT-NEXT:    [[TMP8:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i32 0
+; CHECK-OOB-STRICT-NEXT:    [[TMP9:%.*]] = insertelement <2 x i32> [[TMP8]], i32 [[DOTCAST1_CAST]], i32 1
+; CHECK-OOB-STRICT-NEXT:    store <2 x i32> [[TMP9]], ptr addrspace(2) [[STORE_GEP3]], align 4
+; CHECK-OOB-STRICT-NEXT:    ret void
+;
   %gep1 = getelementptr inbounds i32, ptr addrspace(1) %ptr1, i64 0
   %load1 = load i32, ptr addrspace(1) %gep1, align 4
   %gep2 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %ptr1, i64 1
@@ -136,10 +223,25 @@ define void @merge_i32_2i16_float_4i8(ptr addrspace(1) %ptr1, ptr addrspace(2) %
   ret void
 }
 
-; CHECK-LABEL: @merge_fp_type(
-; CHECK: load <2 x float>
-; CHECK: bitcast float {{.*}} to <2 x half>
 define void @merge_fp_type(ptr addrspace(1) %ptr1, ptr addrspace(2) %ptr2) {
+; CHECK-OOB-RELAXED-LABEL: define void @merge_fp_type(
+; CHECK-OOB-RELAXED-SAME: ptr addrspace(1) [[PTR1:%.*]], ptr addrspace(2) [[PTR2:%.*]]) #[[ATTR1]] {
+; CHECK-OOB-RELAXED-NEXT:    [[GEP1:%.*]] = getelementptr inbounds float, ptr addrspace(1) [[PTR1]], i64 0
+; CHECK-OOB-RELAXED-NEXT:    [[TMP1:%.*]] = load <2 x float>, ptr addrspace(1) [[GEP1]], align 4
+; CHECK-OOB-RELAXED-NEXT:    [[LOAD11:%.*]] = extractelement <2 x float> [[TMP1]], i32 0
+; CHECK-OOB-RELAXED-NEXT:    [[TMP2:%.*]] = extractelement <2 x float> [[TMP1]], i32 1
+; CHECK-OOB-RELAXED-NEXT:    [[DOTCAST:%.*]] = bitcast float [[TMP2]] to <2 x half>
+; CHECK-OOB-RELAXED-NEXT:    ret void
+;
+; CHECK-OOB-STRICT-LABEL: define void @merge_fp_type(
+; CHECK-OOB-STRICT-SAME: ptr addrspace(1) [[PTR1:%.*]], ptr addrspace(2) [[PTR2:%.*]]) {
+; CHECK-OOB-STRICT-NEXT:    [[GEP1:%.*]] = getelementptr inbounds float, ptr addrspace(1) [[PTR1]], i64 0
+; CHECK-OOB-STRICT-NEXT:    [[TMP1:%.*]] = load <2 x float>, ptr addrspace(1) [[GEP1]], align 4
+; CHECK-OOB-STRICT-NEXT:    [[LOAD11:%.*]] = extractelement <2 x float> [[TMP1]], i32 0
+; CHECK-OOB-STRICT-NEXT:    [[TMP2:%.*]] = extractelement <2 x float> [[TMP1]], i32 1
+; CHECK-OOB-STRICT-NEXT:    [[DOTCAST:%.*]] = bitcast float [[TMP2]] to <2 x half>
+; CHECK-OOB-STRICT-NEXT:    ret void
+;
   %gep1 = getelementptr inbounds float, ptr addrspace(1) %ptr1, i64 0
   %load1 = load float, ptr addrspace(1) %gep1, align 4
   %gep2 = getelementptr inbounds <2 x half>, ptr addrspace(1) %ptr1, i64 1