Skip to content

Commit 2d3262e

Browse files
lenarylenary
committed
[RISCV] Merge Xqci Decoder Tables
RISC-V has multiple decoder tables because there is no guarantee that non-standard extensions do not overlap with each other. Qualcomm's Xqci family of extensions are intended to be implemented together, and therefore we want a single decode table for this group of extensions. This should be more efficient overall. To implement this, the key addition is `TRY_TO_DECODE_FEATURE_ANY`, which will use the provided decoder table if any of the features from the FeatureBitset (first argument) are enabled, rather than if all are enabled.
1 parent cc675c6 commit 2d3262e

File tree

2 files changed

+39
-49
lines changed

2 files changed

+39
-49
lines changed

‎llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp‎

Lines changed: 19 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -606,6 +606,8 @@ void RISCVDisassembler::addSPOperands(MCInst &MI) const {
606606
(void)nullptr)
607607
#define TRY_TO_DECODE_FEATURE(FEATURE, DECODER_TABLE, DESC) \
608608
TRY_TO_DECODE(STI.hasFeature(FEATURE), DECODER_TABLE, DESC)
609+
#define TRY_TO_DECODE_FEATURE_ANY(FEATURES, DECODER_TABLE, DESC) \
610+
TRY_TO_DECODE((STI.getFeatureBits() & (FEATURES)).any(), DECODER_TABLE, DESC)
609611

610612
DecodeStatus RISCVDisassembler::getInstruction32(MCInst &MI, uint64_t &Size,
611613
ArrayRef<uint8_t> Bytes,
@@ -701,26 +703,15 @@ DecodeStatus RISCVDisassembler::getInstruction32(MCInst &MI, uint64_t &Size,
701703
"CORE-V SIMD extensions custom opcode table");
702704
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXCVbi, DecoderTableXCVbi32,
703705
"CORE-V Immediate Branching custom opcode table");
704-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqcicsr, DecoderTableXqcicsr32,
705-
"Qualcomm uC CSR custom opcode table");
706-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqcisls, DecoderTableXqcisls32,
707-
"Qualcomm uC Scaled Load Store custom opcode table");
708-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqcia, DecoderTableXqcia32,
709-
"Qualcomm uC Arithmetic custom opcode table");
710-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqcics, DecoderTableXqcics32,
711-
"Qualcomm uC Conditional Select custom opcode table");
712-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqcilsm, DecoderTableXqcilsm32,
713-
"Qualcomm uC Load Store Multiple custom opcode table");
714-
TRY_TO_DECODE_FEATURE(
715-
RISCV::FeatureVendorXqciac, DecoderTableXqciac32,
716-
"Qualcomm uC Load-Store Address Calculation custom opcode table");
717-
TRY_TO_DECODE_FEATURE(
718-
RISCV::FeatureVendorXqcicli, DecoderTableXqcicli32,
719-
"Qualcomm uC Conditional Load Immediate custom opcode table");
720-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqcicm, DecoderTableXqcicm32,
721-
"Qualcomm uC Conditional Move custom opcode table");
722-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqciint, DecoderTableXqciint32,
723-
"Qualcomm uC Interrupts custom opcode table");
706+
707+
FeatureBitset XqciFeaturesWith32BitInsts = {
708+
RISCV::FeatureVendorXqcicsr, RISCV::FeatureVendorXqcisls,
709+
RISCV::FeatureVendorXqcia, RISCV::FeatureVendorXqcics,
710+
RISCV::FeatureVendorXqcilsm, RISCV::FeatureVendorXqciac,
711+
RISCV::FeatureVendorXqcicli, RISCV::FeatureVendorXqcicm,
712+
RISCV::FeatureVendorXqciint};
713+
TRY_TO_DECODE_FEATURE_ANY(XqciFeaturesWith32BitInsts, DecoderTableXqci32,
714+
"Qualcomm uC Extensions");
724715
TRY_TO_DECODE(true, DecoderTable32, "RISCV32 table");
725716

726717
return MCDisassembler::Fail;
@@ -747,14 +738,13 @@ DecodeStatus RISCVDisassembler::getInstruction16(MCInst &MI, uint64_t &Size,
747738
TRY_TO_DECODE_FEATURE(
748739
RISCV::FeatureStdExtZcmp, DecoderTableRVZcmp16,
749740
"Zcmp table (16-bit Push/Pop & Double Move Instructions)");
750-
TRY_TO_DECODE_FEATURE(
751-
RISCV::FeatureVendorXqciac, DecoderTableXqciac16,
752-
"Qualcomm uC Load-Store Address Calculation custom 16bit opcode table");
753-
TRY_TO_DECODE_FEATURE(
754-
RISCV::FeatureVendorXqcicm, DecoderTableXqcicm16,
755-
"Qualcomm uC Conditional Move custom 16bit opcode table");
756-
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXqciint, DecoderTableXqciint16,
757-
"Qualcomm uC Interrupts custom 16bit opcode table");
741+
742+
FeatureBitset XqciFeaturesWith16BitInsts = {RISCV::FeatureVendorXqciac,
743+
RISCV::FeatureVendorXqcicm,
744+
RISCV::FeatureVendorXqciint};
745+
TRY_TO_DECODE_FEATURE_ANY(XqciFeaturesWith16BitInsts, DecoderTableXqci16,
746+
"Qualcomm uC 16bit");
747+
758748
TRY_TO_DECODE_AND_ADD_SP(STI.hasFeature(RISCV::FeatureVendorXwchc),
759749
DecoderTableXwchc16,
760750
"WCH QingKe XW custom opcode table");
@@ -779,7 +769,7 @@ DecodeStatus RISCVDisassembler::getInstruction48(MCInst &MI, uint64_t &Size,
779769
Insn += (static_cast<uint64_t>(Bytes[i]) << 8 * i);
780770
}
781771
TRY_TO_DECODE_FEATURE(
782-
RISCV::FeatureVendorXqcilo, DecoderTableXqcilo48,
772+
RISCV::FeatureVendorXqcilo, DecoderTableXqci48,
783773
"Qualcomm uC Large Offset Load Store custom 48bit opcode table");
784774

785775
return MCDisassembler::Fail;

‎llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td‎

Lines changed: 20 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -249,7 +249,7 @@ class QCIRVInstESStore<bits<3> funct3, bits<2> funct2, string opcodestr>
249249
// Instructions
250250
//===----------------------------------------------------------------------===//
251251

252-
let Predicates = [HasVendorXqcicsr, IsRV32], DecoderNamespace = "Xqcicsr" in {
252+
let Predicates = [HasVendorXqcicsr, IsRV32], DecoderNamespace = "Xqci" in {
253253
let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in {
254254
def QC_CSRRWR : RVInstR<0b1000110, 0b000, OPC_SYSTEM, (outs GPR:$rd),
255255
(ins GPR:$rs1, GPRNoX0:$rs2), "qc.csrrwr",
@@ -259,9 +259,9 @@ let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in {
259259
(ins uimm5:$rs1, GPRNoX0:$rs2), "qc.csrrwri",
260260
"$rd, $rs1, $rs2">;
261261
} // hasSideEffects = 1, mayLoad = 0, mayStore = 0
262-
} // Predicates = [HasVendorXqcicsr, IsRV32], DecoderNamespace = "Xqcicsr"
262+
} // Predicates = [HasVendorXqcicsr, IsRV32], DecoderNamespace = "Xqci"
263263

264-
let Predicates = [HasVendorXqcisls, IsRV32], DecoderNamespace = "Xqcisls" in {
264+
let Predicates = [HasVendorXqcisls, IsRV32], DecoderNamespace = "Xqci" in {
265265
def QC_LRB : QCILoad_ScaleIdx<0b1000, "qc.lrb">;
266266
def QC_LRH : QCILoad_ScaleIdx<0b1001, "qc.lrh">;
267267
def QC_LRW : QCILoad_ScaleIdx<0b1010, "qc.lrw">;
@@ -271,9 +271,9 @@ let Predicates = [HasVendorXqcisls, IsRV32], DecoderNamespace = "Xqcisls" in {
271271
def QC_SRB : QCIStore_ScaleIdx<0b1101, "qc.srb">;
272272
def QC_SRH : QCIStore_ScaleIdx<0b1110, "qc.srh">;
273273
def QC_SRW : QCIStore_ScaleIdx<0b1111, "qc.srw">;
274-
} // Predicates = [HasVendorXqcisls, IsRV32], DecoderNamespace = "Xqcisls"
274+
} // Predicates = [HasVendorXqcisls, IsRV32], DecoderNamespace = "Xqci"
275275

276-
let Predicates = [HasVendorXqcia, IsRV32], DecoderNamespace = "Xqcia" in {
276+
let Predicates = [HasVendorXqcia, IsRV32], DecoderNamespace = "Xqci" in {
277277
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
278278
def QC_SLASAT : QCIRVInstRR<0b01010, GPRNoX0, "qc.slasat">;
279279
def QC_SLLSAT : QCIRVInstRR<0b01100, GPRNoX0, "qc.sllsat">;
@@ -295,9 +295,9 @@ let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
295295
def QC_NORMU : QCIRVInstR<0b1000, "qc.normu">;
296296
def QC_NORMEU : QCIRVInstR<0b1001, "qc.normeu">;
297297
} // hasSideEffects = 0, mayLoad = 0, mayStore = 0
298-
} // Predicates = [HasVendorXqcia, IsRV32], DecoderNamespace = "Xqcia"
298+
} // Predicates = [HasVendorXqcia, IsRV32], DecoderNamespace = "Xqci"
299299

300-
let Predicates = [HasVendorXqciac, IsRV32], DecoderNamespace = "Xqciac" in {
300+
let Predicates = [HasVendorXqciac, IsRV32], DecoderNamespace = "Xqci" in {
301301
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
302302
def QC_C_MULIADD : RVInst16CL<0b001, 0b10, (outs GPRC:$rd_wb),
303303
(ins GPRC:$rd, GPRC:$rs1, uimm5:$uimm),
@@ -326,9 +326,9 @@ let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
326326
}
327327

328328
} // hasSideEffects = 0, mayLoad = 0, mayStore = 0
329-
} // Predicates = [HasVendorXqciac, IsRV32], DecoderNamespace = "Xqciac"
329+
} // Predicates = [HasVendorXqciac, IsRV32], DecoderNamespace = "Xqci"
330330

331-
let Predicates = [HasVendorXqcics, IsRV32], DecoderNamespace = "Xqcics" in {
331+
let Predicates = [HasVendorXqcics, IsRV32], DecoderNamespace = "Xqci" in {
332332
def QC_SELECTIIEQ : QCISELECTIICC <0b010, "qc.selectiieq">;
333333
def QC_SELECTIINE : QCISELECTIICC <0b011, "qc.selectiine">;
334334
def QC_SELECTIEQ : QCISELECTICC <0b010, "qc.selectieq">;
@@ -337,19 +337,19 @@ let Predicates = [HasVendorXqcics, IsRV32], DecoderNamespace = "Xqcics" in {
337337
def QC_SELECTNEI : QCISELECTCCI <0b011, "qc.selectnei">;
338338
def QC_SELECTIEQI : QCISELECTICCI <0b010, "qc.selectieqi">;
339339
def QC_SELECTINEI : QCISELECTICCI <0b011, "qc.selectinei">;
340-
} // Predicates = [HasVendorXqcics, IsRV32], DecoderNamespace = "Xqcics"
340+
} // Predicates = [HasVendorXqcics, IsRV32], DecoderNamespace = "Xqci"
341341

342-
let Predicates = [HasVendorXqcilsm, IsRV32], DecoderNamespace = "Xqcilsm" in {
342+
let Predicates = [HasVendorXqcilsm, IsRV32], DecoderNamespace = "Xqci" in {
343343
def QC_SWM : QCIStoreMultiple<0b00, GPRNoX0, "qc.swm">;
344344
def QC_SWMI : QCIStoreMultiple<0b01, uimm5nonzero, "qc.swmi">;
345345
def QC_SETWM : QCIStoreMultiple<0b10, GPRNoX0, "qc.setwm">;
346346
def QC_SETWMI : QCIStoreMultiple<0b11, uimm5nonzero, "qc.setwmi">;
347347

348348
def QC_LWM : QCILoadMultiple<0b00, GPRNoX0, "qc.lwm">;
349349
def QC_LWMI : QCILoadMultiple<0b01, uimm5nonzero, "qc.lwmi">;
350-
} // Predicates = [HasVendorXqcilsm, IsRV32], DecoderNamespace = "Xqcilsm"
350+
} // Predicates = [HasVendorXqcilsm, IsRV32], DecoderNamespace = "Xqci"
351351

352-
let Predicates = [HasVendorXqcicli, IsRV32], DecoderNamespace = "Xqcicli" in {
352+
let Predicates = [HasVendorXqcicli, IsRV32], DecoderNamespace = "Xqci" in {
353353
def QC_LIEQ : QCILICC<0b000, 0b01, GPRNoX0, "qc.lieq">;
354354
def QC_LINE : QCILICC<0b001, 0b01, GPRNoX0, "qc.line">;
355355
def QC_LILT : QCILICC<0b100, 0b01, GPRNoX0, "qc.lilt">;
@@ -363,9 +363,9 @@ let Predicates = [HasVendorXqcicli, IsRV32], DecoderNamespace = "Xqcicli" in {
363363
def QC_LIGEI : QCILICC<0b101, 0b11, simm5, "qc.ligei">;
364364
def QC_LILTUI : QCILICC<0b110, 0b11, uimm5, "qc.liltui">;
365365
def QC_LIGEUI : QCILICC<0b111, 0b11, uimm5, "qc.ligeui">;
366-
} // Predicates = [HasVendorXqcicli, IsRV32], DecoderNamespace = "Xqcicli"
366+
} // Predicates = [HasVendorXqcicli, IsRV32], DecoderNamespace = "Xqci"
367367

368-
let Predicates = [HasVendorXqcicm, IsRV32], DecoderNamespace = "Xqcicm" in {
368+
let Predicates = [HasVendorXqcicm, IsRV32], DecoderNamespace = "Xqci" in {
369369
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
370370
def QC_C_MVEQZ : RVInst16CL<0b101, 0b10, (outs GPRC:$rd_wb),
371371
(ins GPRC:$rd, GPRC:$rs1),
@@ -389,9 +389,9 @@ let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
389389
def QC_MVGEI : QCIMVCCI<0b101, "qc.mvgei", simm5>;
390390
def QC_MVLTUI : QCIMVCCI<0b110, "qc.mvltui", uimm5>;
391391
def QC_MVGEUI : QCIMVCCI<0b111, "qc.mvgeui", uimm5>;
392-
} // Predicates = [HasVendorXqcicm, IsRV32], DecoderNamespace = "Xqcicm"
392+
} // Predicates = [HasVendorXqcicm, IsRV32], DecoderNamespace = "Xqci"
393393

394-
let Predicates = [HasVendorXqciint, IsRV32], DecoderNamespace = "Xqciint" in {
394+
let Predicates = [HasVendorXqciint, IsRV32], DecoderNamespace = "Xqci" in {
395395
let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in
396396
def QC_C_DIR : RVInst16CI<0b000, 0b10, (outs GPRNoX0:$rd), (ins),
397397
"qc.c.dir", "$rd"> {
@@ -421,9 +421,9 @@ let Predicates = [HasVendorXqciint, IsRV32], DecoderNamespace = "Xqciint" in {
421421

422422
let mayLoad = 1, mayStore = 1, isReturn = 1, isTerminator = 1 in
423423
def QC_C_MILEAVERET : QCIRVInst16CI_NONE<0b10100, "qc.c.mileaveret">;
424-
} // Predicates = [HasVendorXqciint, IsRV32], DecoderNamespace = "Xqciint"
424+
} // Predicates = [HasVendorXqciint, IsRV32], DecoderNamespace = "Xqci"
425425

426-
let Predicates = [HasVendorXqcilo, IsRV32], DecoderNamespace = "Xqcilo" in {
426+
let Predicates = [HasVendorXqcilo, IsRV32], DecoderNamespace = "Xqci" in {
427427
def QC_E_LB : QCIRVInstEILoad<0b101, 0b00, "qc.e.lb">;
428428
def QC_E_LBU : QCIRVInstEILoad<0b101, 0b01, "qc.e.lbu">;
429429
def QC_E_LH : QCIRVInstEILoad<0b101, 0b10, "qc.e.lh">;
@@ -433,7 +433,7 @@ let Predicates = [HasVendorXqcilo, IsRV32], DecoderNamespace = "Xqcilo" in {
433433
def QC_E_SB : QCIRVInstESStore<0b110, 0b01, "qc.e.sb">;
434434
def QC_E_SH : QCIRVInstESStore<0b110, 0b10, "qc.e.sh">;
435435
def QC_E_SW : QCIRVInstESStore<0b110, 0b11, "qc.e.sw">;
436-
} // Predicates = [HasVendorXqcilo, IsRV32], DecoderNamespace = "Xqcilo"
436+
} // Predicates = [HasVendorXqcilo, IsRV32], DecoderNamespace = "Xqci"
437437

438438
//===----------------------------------------------------------------------===//
439439
// Aliases

0 commit comments

Comments
 (0)