Skip to content

Commit 2d4a650

Browse files
Add Vector Single-Width Averaging Add and Subtract to isSupportedInstr
1 parent 5f70fea commit 2d4a650

File tree

2 files changed

+185
-0
lines changed

2 files changed

+185
-0
lines changed

llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -959,6 +959,15 @@ static bool isSupportedInstr(const MachineInstr &MI) {
959959
case RISCV::VMV_V_I:
960960
case RISCV::VMV_V_X:
961961
case RISCV::VMV_V_V:
962+
// Vector Single-Width Averaging Add and Subtract
963+
case RISCV::VAADDU_VV:
964+
case RISCV::VAADDU_VX:
965+
case RISCV::VAADD_VV:
966+
case RISCV::VAADD_VX:
967+
case RISCV::VASUBU_VV:
968+
case RISCV::VASUBU_VX:
969+
case RISCV::VASUB_VV:
970+
case RISCV::VASUB_VX:
962971

963972
// Vector Crypto
964973
case RISCV::VWSLL_VI:

llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll

Lines changed: 176 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3535,3 +3535,179 @@ define <vscale x 4 x i1> @vmfgt_vv(<vscale x 4 x float> %a, <vscale x 4 x i1> %b
35353535
%2 = call <vscale x 4 x i1> @llvm.riscv.vmand.nxv4i1(<vscale x 4 x i1> %1, <vscale x 4 x i1> %b, iXLen %vl)
35363536
ret <vscale x 4 x i1> %2
35373537
}
3538+
3539+
define <vscale x 4 x i32> @vaadd_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
3540+
; NOVLOPT-LABEL: vaadd_vv:
3541+
; NOVLOPT: # %bb.0:
3542+
; NOVLOPT-NEXT: csrwi vxrm, 0
3543+
; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma
3544+
; NOVLOPT-NEXT: vaadd.vv v8, v8, v10
3545+
; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
3546+
; NOVLOPT-NEXT: vadd.vv v8, v8, v10
3547+
; NOVLOPT-NEXT: ret
3548+
;
3549+
; VLOPT-LABEL: vaadd_vv:
3550+
; VLOPT: # %bb.0:
3551+
; VLOPT-NEXT: csrwi vxrm, 0
3552+
; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
3553+
; VLOPT-NEXT: vaadd.vv v8, v8, v10
3554+
; VLOPT-NEXT: vadd.vv v8, v8, v10
3555+
; VLOPT-NEXT: ret
3556+
%1 = call <vscale x 4 x i32> @llvm.riscv.vaadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen 0, iXLen -1)
3557+
%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %b, iXLen %vl)
3558+
ret <vscale x 4 x i32> %2
3559+
}
3560+
3561+
define <vscale x 4 x i32> @vaadd_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
3562+
; NOVLOPT-LABEL: vaadd_vx:
3563+
; NOVLOPT: # %bb.0:
3564+
; NOVLOPT-NEXT: csrwi vxrm, 0
3565+
; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, ta, ma
3566+
; NOVLOPT-NEXT: vaadd.vx v10, v8, a0
3567+
; NOVLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
3568+
; NOVLOPT-NEXT: vadd.vv v8, v10, v8
3569+
; NOVLOPT-NEXT: ret
3570+
;
3571+
; VLOPT-LABEL: vaadd_vx:
3572+
; VLOPT: # %bb.0:
3573+
; VLOPT-NEXT: csrwi vxrm, 0
3574+
; VLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
3575+
; VLOPT-NEXT: vaadd.vx v10, v8, a0
3576+
; VLOPT-NEXT: vadd.vv v8, v10, v8
3577+
; VLOPT-NEXT: ret
3578+
%1 = call <vscale x 4 x i32> @llvm.riscv.vaadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, i32 %b, iXLen 0, iXLen -1)
3579+
%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %a, iXLen %vl)
3580+
ret <vscale x 4 x i32> %2
3581+
}
3582+
3583+
define <vscale x 4 x i32> @vasub_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
3584+
; NOVLOPT-LABEL: vasub_vv:
3585+
; NOVLOPT: # %bb.0:
3586+
; NOVLOPT-NEXT: csrwi vxrm, 0
3587+
; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma
3588+
; NOVLOPT-NEXT: vasub.vv v8, v8, v10
3589+
; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
3590+
; NOVLOPT-NEXT: vadd.vv v8, v8, v10
3591+
; NOVLOPT-NEXT: ret
3592+
;
3593+
; VLOPT-LABEL: vasub_vv:
3594+
; VLOPT: # %bb.0:
3595+
; VLOPT-NEXT: csrwi vxrm, 0
3596+
; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
3597+
; VLOPT-NEXT: vasub.vv v8, v8, v10
3598+
; VLOPT-NEXT: vadd.vv v8, v8, v10
3599+
; VLOPT-NEXT: ret
3600+
%1 = call <vscale x 4 x i32> @llvm.riscv.vasub.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen 0, iXLen -1)
3601+
%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %b, iXLen %vl)
3602+
ret <vscale x 4 x i32> %2
3603+
}
3604+
3605+
define <vscale x 4 x i32> @vasub_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
3606+
; NOVLOPT-LABEL: vasub_vx:
3607+
; NOVLOPT: # %bb.0:
3608+
; NOVLOPT-NEXT: csrwi vxrm, 0
3609+
; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, ta, ma
3610+
; NOVLOPT-NEXT: vasub.vx v10, v8, a0
3611+
; NOVLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
3612+
; NOVLOPT-NEXT: vadd.vv v8, v10, v8
3613+
; NOVLOPT-NEXT: ret
3614+
;
3615+
; VLOPT-LABEL: vasub_vx:
3616+
; VLOPT: # %bb.0:
3617+
; VLOPT-NEXT: csrwi vxrm, 0
3618+
; VLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
3619+
; VLOPT-NEXT: vasub.vx v10, v8, a0
3620+
; VLOPT-NEXT: vadd.vv v8, v10, v8
3621+
; VLOPT-NEXT: ret
3622+
%1 = call <vscale x 4 x i32> @llvm.riscv.vasub.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, i32 %b, iXLen 0, iXLen -1)
3623+
%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %a, iXLen %vl)
3624+
ret <vscale x 4 x i32> %2
3625+
}
3626+
3627+
define <vscale x 4 x i32> @vaaddu_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
3628+
; NOVLOPT-LABEL: vaaddu_vv:
3629+
; NOVLOPT: # %bb.0:
3630+
; NOVLOPT-NEXT: csrwi vxrm, 0
3631+
; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma
3632+
; NOVLOPT-NEXT: vaaddu.vv v8, v8, v10
3633+
; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
3634+
; NOVLOPT-NEXT: vadd.vv v8, v8, v10
3635+
; NOVLOPT-NEXT: ret
3636+
;
3637+
; VLOPT-LABEL: vaaddu_vv:
3638+
; VLOPT: # %bb.0:
3639+
; VLOPT-NEXT: csrwi vxrm, 0
3640+
; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
3641+
; VLOPT-NEXT: vaaddu.vv v8, v8, v10
3642+
; VLOPT-NEXT: vadd.vv v8, v8, v10
3643+
; VLOPT-NEXT: ret
3644+
%1 = call <vscale x 4 x i32> @llvm.riscv.vaaddu.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen 0, iXLen -1)
3645+
%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %b, iXLen %vl)
3646+
ret <vscale x 4 x i32> %2
3647+
}
3648+
3649+
define <vscale x 4 x i32> @vaaddu_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
3650+
; NOVLOPT-LABEL: vaaddu_vx:
3651+
; NOVLOPT: # %bb.0:
3652+
; NOVLOPT-NEXT: csrwi vxrm, 0
3653+
; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, ta, ma
3654+
; NOVLOPT-NEXT: vaaddu.vx v10, v8, a0
3655+
; NOVLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
3656+
; NOVLOPT-NEXT: vadd.vv v8, v10, v8
3657+
; NOVLOPT-NEXT: ret
3658+
;
3659+
; VLOPT-LABEL: vaaddu_vx:
3660+
; VLOPT: # %bb.0:
3661+
; VLOPT-NEXT: csrwi vxrm, 0
3662+
; VLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
3663+
; VLOPT-NEXT: vaaddu.vx v10, v8, a0
3664+
; VLOPT-NEXT: vadd.vv v8, v10, v8
3665+
; VLOPT-NEXT: ret
3666+
%1 = call <vscale x 4 x i32> @llvm.riscv.vaaddu.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, i32 %b, iXLen 0, iXLen -1)
3667+
%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %a, iXLen %vl)
3668+
ret <vscale x 4 x i32> %2
3669+
}
3670+
3671+
define <vscale x 4 x i32> @vasubu_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
3672+
; NOVLOPT-LABEL: vasubu_vv:
3673+
; NOVLOPT: # %bb.0:
3674+
; NOVLOPT-NEXT: csrwi vxrm, 0
3675+
; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, ta, ma
3676+
; NOVLOPT-NEXT: vasubu.vv v8, v8, v10
3677+
; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
3678+
; NOVLOPT-NEXT: vadd.vv v8, v8, v10
3679+
; NOVLOPT-NEXT: ret
3680+
;
3681+
; VLOPT-LABEL: vasubu_vv:
3682+
; VLOPT: # %bb.0:
3683+
; VLOPT-NEXT: csrwi vxrm, 0
3684+
; VLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
3685+
; VLOPT-NEXT: vasubu.vv v8, v8, v10
3686+
; VLOPT-NEXT: vadd.vv v8, v8, v10
3687+
; VLOPT-NEXT: ret
3688+
%1 = call <vscale x 4 x i32> @llvm.riscv.vasubu.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen 0, iXLen -1)
3689+
%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %b, iXLen %vl)
3690+
ret <vscale x 4 x i32> %2
3691+
}
3692+
3693+
define <vscale x 4 x i32> @vasubu_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
3694+
; NOVLOPT-LABEL: vasubu_vx:
3695+
; NOVLOPT: # %bb.0:
3696+
; NOVLOPT-NEXT: csrwi vxrm, 0
3697+
; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, ta, ma
3698+
; NOVLOPT-NEXT: vasubu.vx v10, v8, a0
3699+
; NOVLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
3700+
; NOVLOPT-NEXT: vadd.vv v8, v10, v8
3701+
; NOVLOPT-NEXT: ret
3702+
;
3703+
; VLOPT-LABEL: vasubu_vx:
3704+
; VLOPT: # %bb.0:
3705+
; VLOPT-NEXT: csrwi vxrm, 0
3706+
; VLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
3707+
; VLOPT-NEXT: vasubu.vx v10, v8, a0
3708+
; VLOPT-NEXT: vadd.vv v8, v10, v8
3709+
; VLOPT-NEXT: ret
3710+
%1 = call <vscale x 4 x i32> @llvm.riscv.vasubu.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, i32 %b, iXLen 0, iXLen -1)
3711+
%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %a, iXLen %vl)
3712+
ret <vscale x 4 x i32> %2
3713+
}

0 commit comments

Comments
 (0)