Skip to content

Commit 2d8e8dd

Browse files
ostannardostannard
authored
[ARM] Add Cortex-A510 CPU for AArch32 (#118811)
This core was originally AArch64-only, but the r1p0 revision added optional support for AArch32 at EL0. TRM: https://developer.arm.com/documentation/101604/0103
1 parent f893b47 commit 2d8e8dd

File tree

7 files changed

+41
-1
lines changed

7 files changed

+41
-1
lines changed

‎clang/test/Driver/arm-cortex-cpus-2.c‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -544,6 +544,17 @@
544544
// CHECK-CORTEX-A78AE-MFPU: "-target-feature" "+sha2"
545545
// CHECK-CORTEX-A78AE-MFPU: "-target-feature" "+aes"
546546

547+
// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a510 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A510 %s
548+
// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a510 -mfpu=crypto-neon-fp-armv8 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A510-MFPU %s
549+
// CHECK-CORTEX-A510: "-cc1"{{.*}} "-triple" "armv9a-{{.*}} "-target-cpu" "cortex-a510"
550+
// CHECK-CORTEX-A510-NOT: "-target-feature" "{{[+-]}}sm4"
551+
// CHECK-CORTEX-A510-NOT: "-target-feature" "{{[+-]}}sha3"
552+
// CHECK-CORTEX-A510: "-target-feature" "-aes"
553+
// CHECK-CORTEX-A510-SAME: {{$}}
554+
// CHECK-CORTEX-A510-MFPU: "-cc1"{{.*}} "-target-feature" "+fp-armv8"
555+
// CHECK-CORTEX-A510-MFPU: "-target-feature" "+sha2"
556+
// CHECK-CORTEX-A510-MFPU: "-target-feature" "+aes"
557+
547558
// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a710 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A710 %s
548559
// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a710 -mfpu=crypto-neon-fp-armv8 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A710-MFPU %s
549560
// CHECK-CORTEX-A710: "-cc1"{{.*}} "-triple" "armv9a-{{.*}} "-target-cpu" "cortex-a710"

‎clang/test/Misc/target-invalid-cpu-note/arm.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -84,6 +84,7 @@
8484
// CHECK-SAME: {{^}}, cortex-a78
8585
// CHECK-SAME: {{^}}, cortex-a78ae
8686
// CHECK-SAME: {{^}}, cortex-a78c
87+
// CHECK-SAME: {{^}}, cortex-a510
8788
// CHECK-SAME: {{^}}, cortex-a710
8889
// CHECK-SAME: {{^}}, cortex-x1
8990
// CHECK-SAME: {{^}}, cortex-x1c

‎llvm/include/llvm/TargetParser/ARMTargetParser.def‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -374,6 +374,9 @@ ARM_CPU_NAME("cortex-a78ae", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
374374
(ARM::AEK_RAS | ARM::AEK_DOTPROD))
375375
ARM_CPU_NAME("cortex-a78c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
376376
ARM::AEK_FP16 | ARM::AEK_DOTPROD)
377+
ARM_CPU_NAME("cortex-a510", ARMV9A, FK_NEON_FP_ARMV8, false,
378+
(ARM::AEK_DOTPROD | ARM::AEK_FP16FML | ARM::AEK_BF16 |
379+
ARM::AEK_SB | ARM::AEK_I8MM))
377380
ARM_CPU_NAME("cortex-a710", ARMV9A, FK_NEON_FP_ARMV8, false,
378381
(ARM::AEK_DOTPROD | ARM::AEK_FP16FML | ARM::AEK_BF16 |
379382
ARM::AEK_SB | ARM::AEK_I8MM))

‎llvm/lib/Target/ARM/ARMProcessors.td‎

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,8 @@ def ProcA78AE : SubtargetFeature<"cortex-a78ae", "ARMProcFamily", "CortexA78AE
4545
"Cortex-A78AE ARM processors", []>;
4646
def ProcA78C : SubtargetFeature<"a78c", "ARMProcFamily", "CortexA78C",
4747
"Cortex-A78C ARM processors", []>;
48+
def ProcA510 : SubtargetFeature<"cortex-a510", "ARMProcFamily",
49+
"CortexA510", "Cortex-A510 ARM processors", []>;
4850
def ProcA710 : SubtargetFeature<"cortex-a710", "ARMProcFamily",
4951
"CortexA710", "Cortex-A710 ARM processors", []>;
5052
def ProcX1 : SubtargetFeature<"cortex-x1", "ARMProcFamily", "CortexX1",
@@ -518,6 +520,14 @@ def : ProcNoItin<"cortex-a78c", [ARMv82a, ProcA78C,
518520
FeatureDotProd,
519521
FeatureFullFP16]>;
520522

523+
def : ProcNoItin<"cortex-a510", [ARMv9a, ProcA710,
524+
FeatureHWDivThumb,
525+
FeatureHWDivARM,
526+
FeatureFP16FML,
527+
FeatureBF16,
528+
FeatureMatMulInt8,
529+
FeatureSB]>;
530+
521531
def : ProcNoItin<"cortex-a710", [ARMv9a, ProcA710,
522532
FeatureHWDivThumb,
523533
FeatureHWDivARM,

‎llvm/lib/Target/ARM/ARMSubtarget.cpp‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -287,6 +287,7 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
287287
case CortexA78:
288288
case CortexA78AE:
289289
case CortexA78C:
290+
case CortexA510:
290291
case CortexA710:
291292
case CortexR4:
292293
case CortexR5:

‎llvm/test/CodeGen/ARM/build-attributes.ll‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -187,6 +187,12 @@
187187
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
188188
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
189189

190+
; ARMv9a (AArch32)
191+
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a510 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
192+
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a510 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
193+
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a710 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
194+
; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a710 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
195+
190196
; ARMv7a
191197
; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
192198
; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN

‎llvm/unittests/TargetParser/TargetParserTest.cpp‎

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -404,6 +404,14 @@ INSTANTIATE_TEST_SUITE_P(
404404
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC |
405405
ARM::AEK_RAS | ARM::AEK_FP16 | ARM::AEK_DOTPROD,
406406
"8.2-A"),
407+
ARMCPUTestParams<uint64_t>("cortex-a510", "armv9-a", "neon-fp-armv8",
408+
ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT |
409+
ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
410+
ARM::AEK_DSP | ARM::AEK_CRC |
411+
ARM::AEK_RAS | ARM::AEK_DOTPROD |
412+
ARM::AEK_FP16FML | ARM::AEK_BF16 |
413+
ARM::AEK_I8MM | ARM::AEK_SB,
414+
"9-A"),
407415
ARMCPUTestParams<uint64_t>("cortex-a710", "armv9-a", "neon-fp-armv8",
408416
ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT |
409417
ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
@@ -521,7 +529,7 @@ INSTANTIATE_TEST_SUITE_P(
521529
"7-S")),
522530
ARMCPUTestParams<uint64_t>::PrintToStringParamName);
523531

524-
static constexpr unsigned NumARMCPUArchs = 93;
532+
static constexpr unsigned NumARMCPUArchs = 94;
525533

526534
TEST(TargetParserTest, testARMCPUArchList) {
527535
SmallVector<StringRef, NumARMCPUArchs> List;

0 commit comments

Comments
 (0)