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Add AMDGCN flavoured SPIR-V specific bits to the BE: generator number, enable all extensions and non semantic debug info generation.
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8 files changed

+25
-6
lines changed

8 files changed

+25
-6
lines changed

llvm/lib/MC/SPIRVObjectWriter.cpp

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77
//===----------------------------------------------------------------------===//
88

99
#include "llvm/MC/MCAssembler.h"
10+
#include "llvm/MC/MCContext.h"
1011
#include "llvm/MC/MCSPIRVObjectWriter.h"
1112
#include "llvm/MC/MCSection.h"
1213
#include "llvm/MC/MCValue.h"
@@ -17,8 +18,10 @@ using namespace llvm;
1718
void SPIRVObjectWriter::writeHeader(const MCAssembler &Asm) {
1819
constexpr uint32_t MagicNumber = 0x07230203;
1920
constexpr uint32_t GeneratorID = 43;
20-
constexpr uint32_t GeneratorMagicNumber =
21-
(GeneratorID << 16) | (LLVM_VERSION_MAJOR);
21+
const uint32_t GeneratorMagicNumber =
22+
Asm.getContext().getTargetTriple().getVendor() == Triple::AMD
23+
? UINT16_MAX
24+
: ((GeneratorID << 16) | (LLVM_VERSION_MAJOR));
2225
constexpr uint32_t Schema = 0;
2326

2427
W.write<uint32_t>(MagicNumber);

llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -71,7 +71,10 @@ SPIRVSubtarget::SPIRVSubtarget(const Triple &TT, const std::string &CPU,
7171
break;
7272
case Triple::SPIRVSubArch_v14:
7373
default:
74-
SPIRVVersion = VersionTuple(1, 4);
74+
if (TT.getVendor() == Triple::AMD)
75+
SPIRVVersion = VersionTuple(1, 6);
76+
else
77+
SPIRVVersion = VersionTuple(1, 4);
7578
break;
7679
case Triple::SPIRVSubArch_v15:
7780
SPIRVVersion = VersionTuple(1, 5);
@@ -85,14 +88,17 @@ SPIRVSubtarget::SPIRVSubtarget(const Triple &TT, const std::string &CPU,
8588
// Set the environment based on the target triple.
8689
if (TargetTriple.getOS() == Triple::Vulkan)
8790
Env = Shader;
88-
else if (TargetTriple.getEnvironment() == Triple::OpenCL)
91+
else if (TargetTriple.getEnvironment() == Triple::OpenCL ||
92+
TargetTriple.getVendor() == Triple::AMD)
8993
Env = Kernel;
9094
else
9195
Env = Unknown;
9296

9397
// Set the default extensions based on the target triple.
9498
if (TargetTriple.getVendor() == Triple::Intel)
9599
Extensions.insert(SPIRV::Extension::SPV_INTEL_function_pointers);
100+
if (TargetTriple.getVendor() == Triple::AMD)
101+
Extensions = SPIRVExtensionsParser::getValidExtensions(TargetTriple);
96102

97103
// The order of initialization is important.
98104
initAvailableExtensions(Extensions);

llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -244,7 +244,8 @@ static cl::opt<bool> SPVEnableNonSemanticDI(
244244
cl::Optional, cl::init(false));
245245

246246
void SPIRVPassConfig::addPreEmitPass() {
247-
if (SPVEnableNonSemanticDI) {
247+
if (SPVEnableNonSemanticDI ||
248+
getSPIRVTargetMachine().getTargetTriple().getVendor() == Triple::AMD) {
248249
addPass(createSPIRVEmitNonSemanticDIPass(&getTM<SPIRVTargetMachine>()));
249250
}
250251
}

llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,9 @@
11
; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-unknown-unknown %s -o - 2>&1 | FileCheck %s --check-prefix=CHECK-MIR
2+
; RUN: llc --verify-machineinstrs --print-after=spirv-nonsemantic-debug-info -O0 -mtriple=spirv64-amd-amdhsa %s -o - 2>&1 | FileCheck %s --check-prefix=CHECK-MIR
23
; RUN: llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
4+
; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-amd-amdhsa %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
35
; RUN: llc --verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_KHR_non_semantic_info %s -o - | FileCheck %s --check-prefix=CHECK-OPTION
4-
; TODO(#109287): When type is void * the spirv-val raises an error when DebugInfoNone is set as <id> Base Type argument of DebugTypePointer.
6+
; TODO(#109287): When type is void * the spirv-val raises an error when DebugInfoNone is set as <id> Base Type argument of DebugTypePointer.
57
; DISABLED: %if spirv-tools %{ llc --verify-machineinstrs --spv-emit-nonsemantic-debug-info --spirv-ext=+SPV_KHR_non_semantic_info -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
68

79
; CHECK-MIR-DAG: [[i32type:%[0-9]+\:type]] = OpTypeInt 32, 0

llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_optnone.ll

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,8 @@
77
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_EXT_optnone,+SPV_INTEL_optnone %s -o - | FileCheck %s --check-prefixes=CHECK-TWO-EXTENSIONS
88
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=all %s -o - | FileCheck %s --check-prefixes=CHECK-ALL-EXTENSIONS
99

10+
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-amd-amdhsa %s -o - | FileCheck %s --check-prefixes=CHECK-ALL-EXTENSIONS
11+
1012
; CHECK-EXTENSION: OpCapability OptNoneEXT
1113
; CHECK-EXTENSION: OpExtension "SPV_EXT_optnone"
1214
; CHECK-NO-EXTENSION-NOT: OpCapability OptNoneINTEL

llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions.ll

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
11
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown --spirv-ext=all %s -o - | FileCheck %s
2+
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-amd-amdhsa %s -o - | FileCheck %s
23

34
define i6 @getConstantI6() {
45
ret i6 2
Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,6 @@
11
; REQUIRES: spirv-tools
22
; RUN: llc -O0 -mtriple=spirv-unknown-unknown %s -o - --filetype=obj | spirv-dis | FileCheck %s
3+
; RUN: llc -O0 -mtriple=spirv64-amd-amdhsa %s -o - --filetype=obj | spirv-dis | FileCheck --check-prefix=AMDGCNSPIRV %s
34

45
; CHECK: Generator: {{.*}}{{43|LLVM SPIR-V Backend}}{{.*}}
6+
; AMDGCNSPIRV: Generator: {{.*}}{{65535|LLVM SPIR-V Backend}}{{.*}}

llvm/test/CodeGen/SPIRV/physical-layout/spirv-version.ll

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66
; RUN: llc -O0 -mtriple=spirv64v1.4-unknown-unknown %s -o - --filetype=obj | spirv-dis | FileCheck %s --check-prefix=CHECK-SPIRV14
77
; RUN: llc -O0 -mtriple=spirv64v1.5-unknown-unknown %s -o - --filetype=obj | spirv-dis | FileCheck %s --check-prefix=CHECK-SPIRV15
88
; RUN: llc -O0 -mtriple=spirv64v1.6-unknown-unknown %s -o - --filetype=obj | spirv-dis | FileCheck %s --check-prefix=CHECK-SPIRV16
9+
; RUN: llc -O0 -mtriple=spirv64-amd-amdhsa %s -o - --filetype=obj | spirv-dis | FileCheck %s --check-prefix=AMDGCNSPIRV
910

1011
; CHECK-SPIRV10: Version: 1.0
1112
; CHECK-SPIRV11: Version: 1.1
@@ -14,3 +15,4 @@
1415
; CHECK-SPIRV14: Version: 1.4
1516
; CHECK-SPIRV15: Version: 1.5
1617
; CHECK-SPIRV16: Version: 1.6
18+
; AMDGCNSPIRV: Version: 1.6

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