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MaskRaytru
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[ELF] Rewrite R_RISCV_ALIGN nops when r.addend%4 != 0
For RVC, GNU assembler and LLVM integrated assembler add c.nop followed by a sequence of 4-byte nops. Even if remove % 4 == 0, we have to split one 4-byte nop and therefore need to write the code sequence, otherwise we create an incorrect c.unimp. (cherry picked from commit 78084d9)
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2 files changed

+18
-4
lines changed

2 files changed

+18
-4
lines changed

lld/ELF/Arch/RISCV.cpp

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -750,12 +750,13 @@ void elf::riscvFinalizeRelax(int passes) {
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p += size;
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// For R_RISCV_ALIGN, we will place `offset` in a location (among NOPs)
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// to satisfy the alignment requirement. If `remove` is a multiple of 4,
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// it is as if we have skipped some NOPs. Otherwise we are in the middle
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// of a 4-byte NOP, and we need to rewrite the NOP sequence.
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// to satisfy the alignment requirement. If both `remove` and r.addend
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// are multiples of 4, it is as if we have skipped some NOPs. Otherwise
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// we are in the middle of a 4-byte NOP, and we need to rewrite the NOP
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// sequence.
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int64_t skip = 0;
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if (r.type == R_RISCV_ALIGN) {
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if (remove % 4 != 0) {
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if (remove % 4 || r.addend % 4) {
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skip = r.addend - remove;
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int64_t j = 0;
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for (; j + 4 <= skip; j += 4)

lld/test/ELF/riscv-relax-align-rvc.s

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -50,6 +50,12 @@
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# CHECK-NEXT: c.addi a0, 8
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# CHECK-EMPTY:
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# CHECK: <.text2>:
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# CHECK-NEXT: addi a0, a1, 1
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# CHECK-NEXT: c.addi a0, 1
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# CHECK-NEXT: c.nop
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# CHECK-NEXT: c.addi a0, 2
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.global _start
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_start:
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c.addi a0, 1
@@ -73,3 +79,10 @@ d:
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c.addi a0, 8
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.size d, . - d
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.size _start, . - _start
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.section .text2,"ax"
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.balign 16
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addi a0, a1, 1
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c.addi a0, 1
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.balign 8
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c.addi a0, 2

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