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[Mips] Change vsplat_imm_eq_1 to a ComplexPattern. (#116471)
Resolves a FIXME and avoids needing to workaround #116075. Adding parentheses around the (vsplat_imm_eq_1) fixes the error cited in the FIXME by changing the ComplexPattern from a leaf node to an operator.
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+43
-38
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5 files changed

+43
-38
lines changed

‎llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -175,6 +175,10 @@ bool MipsDAGToDAGISel::selectVSplatMaskR(SDValue N, SDValue &Imm) const {
175175
return false;
176176
}
177177

178+
bool MipsDAGToDAGISel::selectVSplatImmEq1(SDValue N) const {
179+
llvm_unreachable("Unimplemented function.");
180+
}
181+
178182
/// Convert vector addition with vector subtraction if that allows to encode
179183
/// constant as an immediate and thus avoid extra 'ldi' instruction.
180184
/// add X, <-1, -1...> --> sub X, <1, 1...>

‎llvm/lib/Target/Mips/MipsISelDAGToDAG.h‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -116,6 +116,9 @@ class MipsDAGToDAGISel : public SelectionDAGISel {
116116
/// starting at bit zero.
117117
virtual bool selectVSplatMaskR(SDValue N, SDValue &Imm) const;
118118

119+
/// Select constant vector splats whose value is 1.
120+
virtual bool selectVSplatImmEq1(SDValue N) const;
121+
119122
/// Convert vector addition with vector subtraction if that allows to encode
120123
/// constant as an immediate and thus avoid extra 'ldi' instruction.
121124
/// add X, <-1, -1...> --> sub X, <1, 1...>

‎llvm/lib/Target/Mips/MipsMSAInstrInfo.td‎

Lines changed: 21 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -198,14 +198,8 @@ def vsplati32 : PatFrag<(ops node:$e0),
198198
(v4i32 (build_vector node:$e0, node:$e0,
199199
node:$e0, node:$e0))>;
200200

201-
def vsplati64_imm_eq_1 : PatLeaf<(bitconvert (v4i32 (build_vector))), [{
202-
APInt Imm;
203-
SDNode *BV = N->getOperand(0).getNode();
204-
EVT EltTy = N->getValueType(0).getVectorElementType();
205-
206-
return selectVSplat(BV, Imm, EltTy.getSizeInBits()) &&
207-
Imm.getBitWidth() == EltTy.getSizeInBits() && Imm == 1;
208-
}]>;
201+
// Any build_vector that is a constant splat with a value that equals 1
202+
def vsplat_imm_eq_1 : ComplexPattern<vAny, 0, "selectVSplatImmEq1">;
209203

210204
def vsplati64 : PatFrag<(ops node:$e0),
211205
(v2i64 (build_vector node:$e0, node:$e0))>;
@@ -217,7 +211,7 @@ def vsplati64_splat_d : PatFrag<(ops node:$e0),
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node:$e0,
218212
node:$e0,
219213
node:$e0)),
220-
vsplati64_imm_eq_1))))>;
214+
(vsplat_imm_eq_1)))))>;
221215

222216
def vsplatf32 : PatFrag<(ops node:$e0),
223217
(v4f32 (build_vector node:$e0, node:$e0,
@@ -352,46 +346,35 @@ def vsplat_maskr_bits_uimm6
352346
: SplatComplexPattern<vsplat_uimm6, vAny, 1, "selectVSplatMaskR",
353347
[build_vector, bitconvert]>;
354348

355-
// Any build_vector that is a constant splat with a value that equals 1
356-
// FIXME: These should be a ComplexPattern but we can't use them because the
357-
// ISel generator requires the uses to have a name, but providing a name
358-
// causes other errors ("used in pattern but not operand list")
359-
def vsplat_imm_eq_1 : PatLeaf<(build_vector), [{
360-
APInt Imm;
361-
EVT EltTy = N->getValueType(0).getVectorElementType();
362-
363-
return selectVSplat(N, Imm, EltTy.getSizeInBits()) &&
364-
Imm.getBitWidth() == EltTy.getSizeInBits() && Imm == 1;
365-
}]>;
366349

367350
def vbclr_b : PatFrag<(ops node:$ws, node:$wt),
368-
(and node:$ws, (vnot (shl vsplat_imm_eq_1, node:$wt)))>;
351+
(and node:$ws, (vnot (shl (vsplat_imm_eq_1), node:$wt)))>;
369352
def vbclr_h : PatFrag<(ops node:$ws, node:$wt),
370-
(and node:$ws, (vnot (shl vsplat_imm_eq_1, node:$wt)))>;
353+
(and node:$ws, (vnot (shl (vsplat_imm_eq_1), node:$wt)))>;
371354
def vbclr_w : PatFrag<(ops node:$ws, node:$wt),
372-
(and node:$ws, (vnot (shl vsplat_imm_eq_1, node:$wt)))>;
355+
(and node:$ws, (vnot (shl (vsplat_imm_eq_1), node:$wt)))>;
373356
def vbclr_d : PatFrag<(ops node:$ws, node:$wt),
374-
(and node:$ws, (vnot (shl (v2i64 vsplati64_imm_eq_1),
357+
(and node:$ws, (vnot (shl (v2i64 (vsplat_imm_eq_1)),
375358
node:$wt)))>;
376359

377360
def vbneg_b : PatFrag<(ops node:$ws, node:$wt),
378-
(xor node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
361+
(xor node:$ws, (shl (vsplat_imm_eq_1), node:$wt))>;
379362
def vbneg_h : PatFrag<(ops node:$ws, node:$wt),
380-
(xor node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
363+
(xor node:$ws, (shl (vsplat_imm_eq_1), node:$wt))>;
381364
def vbneg_w : PatFrag<(ops node:$ws, node:$wt),
382-
(xor node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
365+
(xor node:$ws, (shl (vsplat_imm_eq_1), node:$wt))>;
383366
def vbneg_d : PatFrag<(ops node:$ws, node:$wt),
384-
(xor node:$ws, (shl (v2i64 vsplati64_imm_eq_1),
367+
(xor node:$ws, (shl (v2i64 (vsplat_imm_eq_1)),
385368
node:$wt))>;
386369

387370
def vbset_b : PatFrag<(ops node:$ws, node:$wt),
388-
(or node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
371+
(or node:$ws, (shl (vsplat_imm_eq_1), node:$wt))>;
389372
def vbset_h : PatFrag<(ops node:$ws, node:$wt),
390-
(or node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
373+
(or node:$ws, (shl (vsplat_imm_eq_1), node:$wt))>;
391374
def vbset_w : PatFrag<(ops node:$ws, node:$wt),
392-
(or node:$ws, (shl vsplat_imm_eq_1, node:$wt))>;
375+
(or node:$ws, (shl (vsplat_imm_eq_1), node:$wt))>;
393376
def vbset_d : PatFrag<(ops node:$ws, node:$wt),
394-
(or node:$ws, (shl (v2i64 vsplati64_imm_eq_1),
377+
(or node:$ws, (shl (v2i64 (vsplat_imm_eq_1)),
395378
node:$wt))>;
396379

397380
def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt),
@@ -3842,7 +3825,7 @@ class MSAShiftPat<SDNode Node, ValueType VT, MSAInst Insn, dag Vec> :
38423825
(VT (Insn VT:$ws, VT:$wt))>;
38433826

38443827
class MSABitPat<SDNode Node, ValueType VT, MSAInst Insn, PatFrag Frag> :
3845-
MSAPat<(VT (Node VT:$ws, (shl vsplat_imm_eq_1, (Frag VT:$wt)))),
3828+
MSAPat<(VT (Node VT:$ws, (shl (vsplat_imm_eq_1), (Frag VT:$wt)))),
38463829
(VT (Insn VT:$ws, VT:$wt))>;
38473830

38483831
multiclass MSAShiftPats<SDNode Node, string Insn> {
@@ -3861,7 +3844,7 @@ multiclass MSABitPats<SDNode Node, string Insn> {
38613844
def : MSABitPat<Node, v16i8, !cast<MSAInst>(Insn#_B), vsplati8imm7>;
38623845
def : MSABitPat<Node, v8i16, !cast<MSAInst>(Insn#_H), vsplati16imm15>;
38633846
def : MSABitPat<Node, v4i32, !cast<MSAInst>(Insn#_W), vsplati32imm31>;
3864-
def : MSAPat<(Node v2i64:$ws, (shl (v2i64 vsplati64_imm_eq_1),
3847+
def : MSAPat<(Node v2i64:$ws, (shl (v2i64 (vsplat_imm_eq_1)),
38653848
(vsplati64imm63 v2i64:$wt))),
38663849
(v2i64 (!cast<MSAInst>(Insn#_D) v2i64:$ws, v2i64:$wt))>;
38673850
}
@@ -3872,16 +3855,16 @@ defm : MSAShiftPats<sra, "SRA">;
38723855
defm : MSABitPats<xor, "BNEG">;
38733856
defm : MSABitPats<or, "BSET">;
38743857

3875-
def : MSAPat<(and v16i8:$ws, (vnot (shl vsplat_imm_eq_1,
3858+
def : MSAPat<(and v16i8:$ws, (vnot (shl (vsplat_imm_eq_1),
38763859
(vsplati8imm7 v16i8:$wt)))),
38773860
(v16i8 (BCLR_B v16i8:$ws, v16i8:$wt))>;
3878-
def : MSAPat<(and v8i16:$ws, (vnot (shl vsplat_imm_eq_1,
3861+
def : MSAPat<(and v8i16:$ws, (vnot (shl (vsplat_imm_eq_1),
38793862
(vsplati16imm15 v8i16:$wt)))),
38803863
(v8i16 (BCLR_H v8i16:$ws, v8i16:$wt))>;
3881-
def : MSAPat<(and v4i32:$ws, (vnot (shl vsplat_imm_eq_1,
3864+
def : MSAPat<(and v4i32:$ws, (vnot (shl (vsplat_imm_eq_1),
38823865
(vsplati32imm31 v4i32:$wt)))),
38833866
(v4i32 (BCLR_W v4i32:$ws, v4i32:$wt))>;
3884-
def : MSAPat<(and v2i64:$ws, (vnot (shl (v2i64 vsplati64_imm_eq_1),
3867+
def : MSAPat<(and v2i64:$ws, (vnot (shl (v2i64 (vsplat_imm_eq_1)),
38853868
(vsplati64imm63 v2i64:$wt)))),
38863869
(v2i64 (BCLR_D v2i64:$ws, v2i64:$wt))>;
38873870

‎llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -679,6 +679,18 @@ bool MipsSEDAGToDAGISel::selectVSplatUimmInvPow2(SDValue N,
679679
return false;
680680
}
681681

682+
// Select const vector splat of 1.
683+
bool MipsSEDAGToDAGISel::selectVSplatImmEq1(SDValue N) const {
684+
APInt ImmValue;
685+
EVT EltTy = N->getValueType(0).getVectorElementType();
686+
687+
if (N->getOpcode() == ISD::BITCAST)
688+
N = N->getOperand(0);
689+
690+
return selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) &&
691+
ImmValue.getBitWidth() == EltTy.getSizeInBits() && ImmValue == 1;
692+
}
693+
682694
bool MipsSEDAGToDAGISel::trySelect(SDNode *Node) {
683695
unsigned Opcode = Node->getOpcode();
684696
SDLoc DL(Node);

‎llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -108,6 +108,9 @@ class MipsSEDAGToDAGISel : public MipsDAGToDAGISel {
108108
/// starting at bit zero.
109109
bool selectVSplatMaskR(SDValue N, SDValue &Imm) const override;
110110

111+
/// Select constant vector splats whose value is 1.
112+
bool selectVSplatImmEq1(SDValue N) const override;
113+
111114
bool trySelect(SDNode *Node) override;
112115

113116
// Emits proper ABI for _mcount profiling calls.

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