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[IR][JumpThreading] Fix infinite recursion on compare self-reference (#129501)
In unreachable code, constant PHI nodes may appear and be replaced by their single value. As a result, instructions may become self-referencing. This commit adds checks to avoid going into infinite recursion when handling self-referencing compare instructions in `evaluateOnPredecessorEdge()`. This LLVM defect was identified via the AMD Fuzzing project.
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3 files changed

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lines changed

‎llvm/include/llvm/Transforms/Scalar/JumpThreading.h‎

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Original file line numberDiff line numberDiff line change
@@ -208,6 +208,11 @@ class JumpThreadingPass : public PassInfoMixin<JumpThreadingPass> {
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/// if 'HasProfile' is true creates new instance through
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/// FunctionAnalysisManager, otherwise nullptr.
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BlockFrequencyInfo *getOrCreateBFI(bool Force = false);
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// Internal overload of evaluateOnPredecessorEdge().
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Constant *evaluateOnPredecessorEdge(BasicBlock *BB, BasicBlock *PredPredBB,
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Value *cond, const DataLayout &DL,
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SmallPtrSet<Value *, 8> &Visited);
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};
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} // end namespace llvm

‎llvm/lib/Transforms/Scalar/JumpThreading.cpp‎

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@@ -14,6 +14,7 @@
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/MapVector.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/ScopeExit.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Statistic.h"
@@ -1494,6 +1495,17 @@ Constant *JumpThreadingPass::evaluateOnPredecessorEdge(BasicBlock *BB,
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BasicBlock *PredPredBB,
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Value *V,
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const DataLayout &DL) {
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SmallPtrSet<Value *, 8> Visited;
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return evaluateOnPredecessorEdge(BB, PredPredBB, V, DL, Visited);
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}
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Constant *JumpThreadingPass::evaluateOnPredecessorEdge(
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BasicBlock *BB, BasicBlock *PredPredBB, Value *V, const DataLayout &DL,
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SmallPtrSet<Value *, 8> &Visited) {
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if (!Visited.insert(V).second)
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return nullptr;
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auto _ = make_scope_exit([&Visited, V]() { Visited.erase(V); });
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BasicBlock *PredBB = BB->getSinglePredecessor();
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assert(PredBB && "Expected a single predecessor");
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@@ -1515,12 +1527,16 @@ Constant *JumpThreadingPass::evaluateOnPredecessorEdge(BasicBlock *BB,
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}
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// If we have a CmpInst, try to fold it for each incoming edge into PredBB.
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// Note that during the execution of the pass, phi nodes may become constant
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// and may be removed, which can lead to self-referencing instructions in
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// code that becomes unreachable. Consequently, we need to handle those
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// instructions in unreachable code and check before going into recursion.
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if (CmpInst *CondCmp = dyn_cast<CmpInst>(V)) {
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if (CondCmp->getParent() == BB) {
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Constant *Op0 =
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evaluateOnPredecessorEdge(BB, PredPredBB, CondCmp->getOperand(0), DL);
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Constant *Op1 =
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evaluateOnPredecessorEdge(BB, PredPredBB, CondCmp->getOperand(1), DL);
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Constant *Op0 = evaluateOnPredecessorEdge(
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BB, PredPredBB, CondCmp->getOperand(0), DL, Visited);
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Constant *Op1 = evaluateOnPredecessorEdge(
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BB, PredPredBB, CondCmp->getOperand(1), DL, Visited);
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if (Op0 && Op1) {
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return ConstantFoldCompareInstOperands(CondCmp->getPredicate(), Op0,
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Op1, DL);

‎llvm/test/Transforms/JumpThreading/unreachable-loops.ll‎

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Original file line numberDiff line numberDiff line change
@@ -180,4 +180,121 @@ cleanup2343.loopexit4: ; preds = %cleanup1491
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unreachable
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}
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; This segfaults due to recursion in %C4. Reason: %L6 is identified to be a
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; "partially redundant load" and is replaced by a PHI node. The PHI node is then
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; simplified to be constant and is removed. This leads to %L6 being replaced by
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; %C4, which makes %C4 invalid since it uses %L6.
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; The test case has been generated by the AMD Fuzzing project and simplified
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; manually and by llvm-reduce.
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define i32 @constant_phi_leads_to_self_reference(ptr %ptr) {
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; CHECK-LABEL: @constant_phi_leads_to_self_reference(
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; CHECK-NEXT: [[A9:%.*]] = alloca i1, align 1
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; CHECK-NEXT: br label [[F6:%.*]]
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; CHECK: T3:
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; CHECK-NEXT: br label [[BB5:%.*]]
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; CHECK: BB5:
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; CHECK-NEXT: [[L10:%.*]] = load i1, ptr [[A9]], align 1
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; CHECK-NEXT: br i1 [[L10]], label [[BB6:%.*]], label [[F6]]
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; CHECK: BB6:
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; CHECK-NEXT: [[LGV3:%.*]] = load i1, ptr [[PTR:%.*]], align 1
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; CHECK-NEXT: [[C4:%.*]] = icmp sle i1 [[C4]], true
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; CHECK-NEXT: store i1 [[C4]], ptr [[PTR]], align 1
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; CHECK-NEXT: br i1 [[C4]], label [[F6]], label [[T3:%.*]]
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; CHECK: F6:
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; CHECK-NEXT: ret i32 0
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; CHECK: F7:
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; CHECK-NEXT: br label [[BB5]]
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;
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%A9 = alloca i1, align 1
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br i1 false, label %BB4, label %F6
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BB4: ; preds = %0
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br i1 false, label %F6, label %F1
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F1: ; preds = %BB4
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br i1 false, label %T4, label %T3
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T3: ; preds = %T4, %BB6, %F1
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%L6 = load i1, ptr %ptr, align 1
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br label %BB5
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BB5: ; preds = %F7, %T3
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%L10 = load i1, ptr %A9, align 1
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br i1 %L10, label %BB6, label %F6
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BB6: ; preds = %BB5
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%LGV3 = load i1, ptr %ptr, align 1
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%C4 = icmp sle i1 %L6, true
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store i1 %C4, ptr %ptr, align 1
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br i1 %L6, label %F6, label %T3
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T4: ; preds = %F1
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br label %T3
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F6: ; preds = %BB6, %BB5, %BB4, %0
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ret i32 0
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F7: ; No predecessors!
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br label %BB5
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}
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; Same as above, but with multiple icmps referencing the same PHI node.
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define i32 @recursive_icmp_mult(ptr %ptr) {
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; CHECK-LABEL: @recursive_icmp_mult(
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; CHECK-NEXT: [[A9:%.*]] = alloca i1, align 1
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; CHECK-NEXT: br label [[F6:%.*]]
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; CHECK: T3:
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; CHECK-NEXT: br label [[BB5:%.*]]
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; CHECK: BB5:
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; CHECK-NEXT: [[L10:%.*]] = load i1, ptr [[A9]], align 1
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; CHECK-NEXT: br i1 [[L10]], label [[BB6:%.*]], label [[F6]]
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; CHECK: BB6:
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; CHECK-NEXT: [[LGV3:%.*]] = load i1, ptr [[PTR:%.*]], align 1
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; CHECK-NEXT: [[C4:%.*]] = icmp sle i1 [[C6:%.*]], true
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; CHECK-NEXT: [[C5:%.*]] = icmp sle i1 [[C6]], false
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; CHECK-NEXT: [[C6]] = icmp sle i1 [[C4]], [[C5]]
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; CHECK-NEXT: store i1 [[C6]], ptr [[PTR]], align 1
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; CHECK-NEXT: br i1 [[C6]], label [[F6]], label [[T3:%.*]]
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; CHECK: F6:
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; CHECK-NEXT: ret i32 0
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; CHECK: F7:
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; CHECK-NEXT: br label [[BB5]]
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;
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%A9 = alloca i1, align 1
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br i1 false, label %BB4, label %F6
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BB4: ; preds = %0
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br i1 false, label %F6, label %F1
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F1: ; preds = %BB4
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br i1 false, label %T4, label %T3
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T3: ; preds = %T4, %BB6, %F1
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%L6 = load i1, ptr %ptr, align 1
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br label %BB5
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BB5: ; preds = %F7, %T3
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%L10 = load i1, ptr %A9, align 1
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br i1 %L10, label %BB6, label %F6
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BB6: ; preds = %BB5
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%LGV3 = load i1, ptr %ptr, align 1
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%C4 = icmp sle i1 %L6, true
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%C5 = icmp sle i1 %L6, false
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%C6 = icmp sle i1 %C4, %C5
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store i1 %C6, ptr %ptr, align 1
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br i1 %L6, label %F6, label %T3
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T4: ; preds = %F1
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br label %T3
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F6: ; preds = %BB6, %BB5, %BB4, %0
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ret i32 0
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F7: ; No predecessors!
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br label %BB5
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}
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!0 = !{!"branch_weights", i32 2146410443, i32 1073205}

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