@@ -206,8 +206,7 @@ _mm_abs_epi32(__m128i __a) {
206206// / both operands.
207207static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
208208_mm_hadd_epi16(__m128i __a, __m128i __b) {
209- return (__m128i)__builtin_ia32_phaddw128 (
210- (__v8hi)__a, (__v8hi)__b);
209+ return (__m128i)__builtin_ia32_phaddw128 ((__v8hi)__a, (__v8hi)__b);
211210}
212211
213212// / Horizontally adds the adjacent pairs of values contained in 2 packed
@@ -249,8 +248,8 @@ _mm_hadd_epi32(__m128i __a, __m128i __b) {
249248// / destination.
250249// / \returns A 64-bit vector of [4 x i16] containing the horizontal sums of both
251250// / operands.
252- static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR
253- _mm_hadd_pi16 (__m64 __a, __m64 __b) {
251+ static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hadd_pi16 (__m64 __a,
252+ __m64 __b) {
254253 return __trunc64 (__builtin_ia32_phaddw128 (
255254 (__v8hi)__builtin_shufflevector (__a, __b, 0 , 1 ), (__v8hi){}));
256255}
@@ -272,11 +271,10 @@ static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR
272271// / destination.
273272// / \returns A 64-bit vector of [2 x i32] containing the horizontal sums of both
274273// / operands.
275- static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR
276- _mm_hadd_pi32 (__m64 __a, __m64 __b)
277- {
278- return __trunc64 (__builtin_ia32_phaddd128 (
279- (__v4si)__builtin_shufflevector (__a, __b, 0 , 1 ), (__v4si){}));
274+ static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hadd_pi32 (__m64 __a,
275+ __m64 __b) {
276+ return __trunc64 (__builtin_ia32_phaddd128 (
277+ (__v4si)__builtin_shufflevector (__a, __b, 0 , 1 ), (__v4si){}));
280278}
281279
282280// / Horizontally adds, with saturation, the adjacent pairs of values contained
@@ -324,11 +322,10 @@ _mm_hadds_epi16(__m128i __a, __m128i __b) {
324322// / destination.
325323// / \returns A 64-bit vector of [4 x i16] containing the horizontal saturated
326324// / sums of both operands.
327- static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR
328- _mm_hadds_pi16 (__m64 __a, __m64 __b)
329- {
330- return __trunc64 (__builtin_ia32_phaddsw128 (
331- (__v8hi)__builtin_shufflevector (__a, __b, 0 , 1 ), (__v8hi){}));
325+ static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hadds_pi16 (__m64 __a,
326+ __m64 __b) {
327+ return __trunc64 (__builtin_ia32_phaddsw128 (
328+ (__v8hi)__builtin_shufflevector (__a, __b, 0 , 1 ), (__v8hi){}));
332329}
333330
334331// / Horizontally subtracts the adjacent pairs of values contained in 2
@@ -392,11 +389,10 @@ _mm_hsub_epi32(__m128i __a, __m128i __b) {
392389// / the destination.
393390// / \returns A 64-bit vector of [4 x i16] containing the horizontal differences
394391// / of both operands.
395- static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR
396- _mm_hsub_pi16 (__m64 __a, __m64 __b)
397- {
398- return __trunc64 (__builtin_ia32_phsubw128 (
399- (__v8hi)__builtin_shufflevector (__a, __b, 0 , 1 ), (__v8hi){}));
392+ static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hsub_pi16 (__m64 __a,
393+ __m64 __b) {
394+ return __trunc64 (__builtin_ia32_phsubw128 (
395+ (__v8hi)__builtin_shufflevector (__a, __b, 0 , 1 ), (__v8hi){}));
400396}
401397
402398// / Horizontally subtracts the adjacent pairs of values contained in 2
@@ -416,11 +412,10 @@ _mm_hsub_pi16(__m64 __a, __m64 __b)
416412// / the destination.
417413// / \returns A 64-bit vector of [2 x i32] containing the horizontal differences
418414// / of both operands.
419- static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR
420- _mm_hsub_pi32 (__m64 __a, __m64 __b)
421- {
422- return __trunc64 (__builtin_ia32_phsubd128 (
423- (__v4si)__builtin_shufflevector (__a, __b, 0 , 1 ), (__v4si){}));
415+ static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hsub_pi32 (__m64 __a,
416+ __m64 __b) {
417+ return __trunc64 (__builtin_ia32_phsubd128 (
418+ (__v4si)__builtin_shufflevector (__a, __b, 0 , 1 ), (__v4si){}));
424419}
425420
426421// / Horizontally subtracts, with saturation, the adjacent pairs of values
@@ -468,11 +463,10 @@ _mm_hsubs_epi16(__m128i __a, __m128i __b) {
468463// / the destination.
469464// / \returns A 64-bit vector of [4 x i16] containing the horizontal saturated
470465// / differences of both operands.
471- static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR
472- _mm_hsubs_pi16 (__m64 __a, __m64 __b)
473- {
474- return __trunc64 (__builtin_ia32_phsubsw128 (
475- (__v8hi)__builtin_shufflevector (__a, __b, 0 , 1 ), (__v8hi){}));
466+ static __inline__ __m64 __DEFAULT_FN_ATTRS_CONSTEXPR _mm_hsubs_pi16 (__m64 __a,
467+ __m64 __b) {
468+ return __trunc64 (__builtin_ia32_phsubsw128 (
469+ (__v8hi)__builtin_shufflevector (__a, __b, 0 , 1 ), (__v8hi){}));
476470}
477471
478472// / Multiplies corresponding pairs of packed 8-bit unsigned integer
@@ -553,9 +547,8 @@ _mm_maddubs_pi16(__m64 __a, __m64 __b) {
553547// / \returns A 128-bit vector of [8 x i16] containing the rounded and scaled
554548// / products of both operands.
555549static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
556- _mm_mulhrs_epi16 (__m128i __a, __m128i __b)
557- {
558- return (__m128i)__builtin_ia32_pmulhrsw128 ((__v8hi)__a, (__v8hi)__b);
550+ _mm_mulhrs_epi16 (__m128i __a, __m128i __b) {
551+ return (__m128i)__builtin_ia32_pmulhrsw128 ((__v8hi)__a, (__v8hi)__b);
559552}
560553
561554// / Multiplies packed 16-bit signed integer values, truncates the 32-bit
0 commit comments