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tonykuttaiTony Varghese
tonykuttai
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Tony Varghese
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[NFC][PowerPC] Pre-commit testcases for locking down the xxsel instructions for ternary(A, X, eqv(B,C)), ternary(A, X, not(C)), ternary(A, X, not(B)), ternary(A, X, nand(B,C)) and ternary(A, X, nor(B,C)) patterns (#158091)
Pre-commit test case for exploitation of `xxsel` for ternary operations of the pattern. This adds support for v4i32, v2i64, v16i8 and v8i16 operand types for the following patterns. The following are the patterns involved in the change: ``` ternary(A, and(B,C), nor(B,C)) ternary(A, B, nor(B,C)) ternary(A, C, nor(B,C)) ternary(A, xor(B,C), nor(B,C)) ternary(A, not(C), nor(B,C)) ternary(A, not(B), nor(B,C)) ternary(A, nand(B,C), nor(B,C)) ternary(A, or(B,C), eqv(B,C)) ternary(A, nor(B,C), eqv(B,C)) ternary(A, not(C), eqv(B,C)) ternary(A, nand(B,C), eqv(B,C)) ternary(A, and(B,C), not(C)) ternary(A, B, not(C)) ternary(A, xor(B,C), not(C)) ternary(A, or(B,C), not(C)) ternary(A, not(B), not(C)) ternary(A, nand(B,C), not(C)) ternary(A, and(B,C), not(B)) ternary(A, xor(B,C), not(B)) ternary(A, or(B,C), not(B)) ternary(A, nand(B,C), not(B)) ternary(A, B, nand(B,C)) ternary(A, C, nand(B,C)) ternary(A, xor(B,C), nand(B,C)) ternary(A, or(B,C), nand(B,C)) ternary(A, eqv(B,C), nand(B,C)) ``` Exploitation of `xxeval` for the above patterns to be added as a follow up. Co-authored-by: Tony Varghese <[email protected]>
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‎llvm/test/CodeGen/PowerPC/xxeval-vselect-x-eqv.ll‎

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; Test file to verify the emission of Vector Evaluate instructions when ternary operators are used.
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; RUN: llc -verify-machineinstrs -mcpu=pwr10 -mtriple=powerpc64le-unknown-unknown \
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; RUN: -ppc-asm-full-reg-names --ppc-vsr-nums-as-vr < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr10 -mtriple=powerpc-ibm-aix-xcoff \
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; RUN: -ppc-asm-full-reg-names --ppc-vsr-nums-as-vr < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr10 -mtriple=powerpc64-ibm-aix-xcoff \
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; RUN: -ppc-asm-full-reg-names --ppc-vsr-nums-as-vr < %s | FileCheck %s
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; Function to test ternary(A, or(B, C), eqv(B, C)) for <4 x i32>
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define <4 x i32> @ternary_A_or_BC_eqv_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
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; CHECK-LABEL: ternary_A_or_BC_eqv_BC_4x32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxleqv v5, v5, v5
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; CHECK-NEXT: xxlor vs0, v3, v4
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; CHECK-NEXT: xxleqv vs1, v3, v4
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; CHECK-NEXT: vslw v2, v2, v5
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; CHECK-NEXT: vsraw v2, v2, v5
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; CHECK-NEXT: xxsel v2, vs1, vs0, v2
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; CHECK-NEXT: blr
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entry:
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%or = or <4 x i32> %B, %C
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%xor = xor <4 x i32> %B, %C
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%eqv = xor <4 x i32> %xor, <i32 -1, i32 -1, i32 -1, i32 -1> ; Vector eqv operation
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%res = select <4 x i1> %A, <4 x i32> %or, <4 x i32> %eqv
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ret <4 x i32> %res
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}
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; Function to test ternary(A, or(B, C), eqv(B, C)) for <2 x i64>
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define <2 x i64> @ternary_A_or_BC_eqv_BC_2x64(<2 x i1> %A, <2 x i64> %B, <2 x i64> %C) {
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; CHECK-LABEL: ternary_A_or_BC_eqv_BC_2x64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxlxor v5, v5, v5
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; CHECK-NEXT: xxlor vs0, v3, v4
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; CHECK-NEXT: xxleqv vs1, v3, v4
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; CHECK-NEXT: xxsplti32dx v5, 1, 63
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; CHECK-NEXT: vsld v2, v2, v5
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; CHECK-NEXT: vsrad v2, v2, v5
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; CHECK-NEXT: xxsel v2, vs1, vs0, v2
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; CHECK-NEXT: blr
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entry:
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%or = or <2 x i64> %B, %C
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%xor = xor <2 x i64> %B, %C
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%eqv = xor <2 x i64> %xor, <i64 -1, i64 -1> ; Vector eqv operation
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%res = select <2 x i1> %A, <2 x i64> %or, <2 x i64> %eqv
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ret <2 x i64> %res
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}
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; Function to test ternary(A, or(B, C), eqv(B, C)) for <16 x i8>
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define <16 x i8> @ternary_A_or_BC_eqv_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
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; CHECK-LABEL: ternary_A_or_BC_eqv_BC_16x8:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxspltib v5, 7
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; CHECK-NEXT: xxlor vs0, v3, v4
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; CHECK-NEXT: xxleqv vs1, v3, v4
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; CHECK-NEXT: vslb v2, v2, v5
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; CHECK-NEXT: vsrab v2, v2, v5
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; CHECK-NEXT: xxsel v2, vs1, vs0, v2
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; CHECK-NEXT: blr
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entry:
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%or = or <16 x i8> %B, %C
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%xor = xor <16 x i8> %B, %C
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%eqv = xor <16 x i8> %xor, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector eqv operation
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%res = select <16 x i1> %A, <16 x i8> %or, <16 x i8> %eqv
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ret <16 x i8> %res
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}
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; Function to test ternary(A, or(B, C), eqv(B, C)) for <8 x i16>
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define <8 x i16> @ternary_A_or_BC_eqv_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
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; CHECK-LABEL: ternary_A_or_BC_eqv_BC_8x16:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxspltiw v5, 983055
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; CHECK-NEXT: xxlor vs0, v3, v4
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; CHECK-NEXT: xxleqv vs1, v3, v4
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; CHECK-NEXT: vslh v2, v2, v5
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; CHECK-NEXT: vsrah v2, v2, v5
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; CHECK-NEXT: xxsel v2, vs1, vs0, v2
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; CHECK-NEXT: blr
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entry:
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%or = or <8 x i16> %B, %C
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%xor = xor <8 x i16> %B, %C
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%eqv = xor <8 x i16> %xor, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector eqv operation
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%res = select <8 x i1> %A, <8 x i16> %or, <8 x i16> %eqv
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ret <8 x i16> %res
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}
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; Function to test ternary(A, nor(B, C), eqv(B, C)) for <4 x i32>
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define <4 x i32> @ternary_A_nor_BC_eqv_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
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; CHECK-LABEL: ternary_A_nor_BC_eqv_BC_4x32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxleqv v5, v5, v5
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; CHECK-NEXT: xxlnor vs0, v3, v4
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; CHECK-NEXT: xxleqv vs1, v3, v4
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; CHECK-NEXT: vslw v2, v2, v5
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; CHECK-NEXT: vsraw v2, v2, v5
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; CHECK-NEXT: xxsel v2, vs1, vs0, v2
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; CHECK-NEXT: blr
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entry:
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%or = or <4 x i32> %B, %C
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%nor = xor <4 x i32> %or, <i32 -1, i32 -1, i32 -1, i32 -1> ; Vector NOR operation
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%xor = xor <4 x i32> %B, %C
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%eqv = xor <4 x i32> %xor, <i32 -1, i32 -1, i32 -1, i32 -1> ; Vector eqv operation
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%res = select <4 x i1> %A, <4 x i32> %nor, <4 x i32> %eqv
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ret <4 x i32> %res
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}
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; Function to test ternary(A, nor(B, C), eqv(B, C)) for <2 x i64>
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define <2 x i64> @ternary_A_nor_BC_eqv_BC_2x64(<2 x i1> %A, <2 x i64> %B, <2 x i64> %C) {
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; CHECK-LABEL: ternary_A_nor_BC_eqv_BC_2x64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxlxor v5, v5, v5
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; CHECK-NEXT: xxlnor vs0, v3, v4
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; CHECK-NEXT: xxleqv vs1, v3, v4
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; CHECK-NEXT: xxsplti32dx v5, 1, 63
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; CHECK-NEXT: vsld v2, v2, v5
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; CHECK-NEXT: vsrad v2, v2, v5
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; CHECK-NEXT: xxsel v2, vs1, vs0, v2
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; CHECK-NEXT: blr
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entry:
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%or = or <2 x i64> %B, %C
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%nor = xor <2 x i64> %or, <i64 -1, i64 -1> ; Vector NOR operation
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%xor = xor <2 x i64> %B, %C
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%eqv = xor <2 x i64> %xor, <i64 -1, i64 -1> ; Vector eqv operation
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%res = select <2 x i1> %A, <2 x i64> %nor, <2 x i64> %eqv
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ret <2 x i64> %res
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}
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; Function to test ternary(A, nor(B, C), eqv(B, C)) for <16 x i8>
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define <16 x i8> @ternary_A_nor_BC_eqv_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
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; CHECK-LABEL: ternary_A_nor_BC_eqv_BC_16x8:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxspltib v5, 7
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; CHECK-NEXT: xxlnor vs0, v3, v4
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; CHECK-NEXT: xxleqv vs1, v3, v4
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; CHECK-NEXT: vslb v2, v2, v5
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; CHECK-NEXT: vsrab v2, v2, v5
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; CHECK-NEXT: xxsel v2, vs1, vs0, v2
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; CHECK-NEXT: blr
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entry:
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%or = or <16 x i8> %B, %C
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%nor = xor <16 x i8> %or, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector NOR operation
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%xor = xor <16 x i8> %B, %C
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%eqv = xor <16 x i8> %xor, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector eqv operation
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%res = select <16 x i1> %A, <16 x i8> %nor, <16 x i8> %eqv
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ret <16 x i8> %res
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}
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; Function to test ternary(A, nor(B, C), eqv(B, C)) for <8 x i16>
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define <8 x i16> @ternary_A_nor_BC_eqv_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
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; CHECK-LABEL: ternary_A_nor_BC_eqv_BC_8x16:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxspltiw v5, 983055
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; CHECK-NEXT: xxlnor vs0, v3, v4
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; CHECK-NEXT: xxleqv vs1, v3, v4
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; CHECK-NEXT: vslh v2, v2, v5
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; CHECK-NEXT: vsrah v2, v2, v5
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; CHECK-NEXT: xxsel v2, vs1, vs0, v2
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; CHECK-NEXT: blr
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entry:
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%or = or <8 x i16> %B, %C
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%nor = xor <8 x i16> %or, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector NOR operation
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%xor = xor <8 x i16> %B, %C
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%eqv = xor <8 x i16> %xor, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector eqv operation
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%res = select <8 x i1> %A, <8 x i16> %nor, <8 x i16> %eqv
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ret <8 x i16> %res
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}
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; Function to test ternary(A, not(C), eqv(B, C)) for <4 x i32>
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define <4 x i32> @ternary_A_not_C_eqv_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
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; CHECK-LABEL: ternary_A_not_C_eqv_BC_4x32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxleqv v5, v5, v5
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; CHECK-NEXT: xxlnor vs0, v4, v4
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; CHECK-NEXT: xxleqv vs1, v4, v3
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; CHECK-NEXT: vslw v2, v2, v5
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; CHECK-NEXT: vsraw v2, v2, v5
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; CHECK-NEXT: xxsel v2, vs1, vs0, v2
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; CHECK-NEXT: blr
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entry:
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%not = xor <4 x i32> %C, <i32 -1, i32 -1, i32 -1, i32 -1> ; Vector not operation
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%xor = xor <4 x i32> %B, %C
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%eqv = xor <4 x i32> %xor, <i32 -1, i32 -1, i32 -1, i32 -1> ; Vector eqv operation
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%res = select <4 x i1> %A, <4 x i32> %not, <4 x i32> %eqv
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ret <4 x i32> %res
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}
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; Function to test ternary(A, not(C), eqv(B, C)) for <2 x i64>
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define <2 x i64> @ternary_A_not_C_eqv_BC_2x64(<2 x i1> %A, <2 x i64> %B, <2 x i64> %C) {
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; CHECK-LABEL: ternary_A_not_C_eqv_BC_2x64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxlxor v5, v5, v5
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; CHECK-NEXT: xxlnor vs0, v4, v4
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; CHECK-NEXT: xxleqv vs1, v4, v3
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; CHECK-NEXT: xxsplti32dx v5, 1, 63
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; CHECK-NEXT: vsld v2, v2, v5
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; CHECK-NEXT: vsrad v2, v2, v5
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; CHECK-NEXT: xxsel v2, vs1, vs0, v2
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; CHECK-NEXT: blr
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entry:
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%not = xor <2 x i64> %C, <i64 -1, i64 -1> ; Vector not operation
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%xor = xor <2 x i64> %B, %C
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%eqv = xor <2 x i64> %xor, <i64 -1, i64 -1> ; Vector eqv operation
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%res = select <2 x i1> %A, <2 x i64> %not, <2 x i64> %eqv
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ret <2 x i64> %res
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}
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; Function to test ternary(A, not(C), eqv(B, C)) for <16 x i8>
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define <16 x i8> @ternary_A_not_C_eqv_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
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; CHECK-LABEL: ternary_A_not_C_eqv_BC_16x8:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxspltib v5, 7
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; CHECK-NEXT: xxlnor vs0, v4, v4
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; CHECK-NEXT: xxleqv vs1, v4, v3
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; CHECK-NEXT: vslb v2, v2, v5
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; CHECK-NEXT: vsrab v2, v2, v5
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; CHECK-NEXT: xxsel v2, vs1, vs0, v2
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; CHECK-NEXT: blr
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entry:
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%not = xor <16 x i8> %C, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector not operation
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%xor = xor <16 x i8> %B, %C
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%eqv = xor <16 x i8> %xor, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector eqv operation
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%res = select <16 x i1> %A, <16 x i8> %not, <16 x i8> %eqv
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ret <16 x i8> %res
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}
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; Function to test ternary(A, not(C), eqv(B, C)) for <8 x i16>
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define <8 x i16> @ternary_A_not_C_eqv_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
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; CHECK-LABEL: ternary_A_not_C_eqv_BC_8x16:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxspltiw v5, 983055
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; CHECK-NEXT: xxlnor vs0, v4, v4
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; CHECK-NEXT: xxleqv vs1, v4, v3
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; CHECK-NEXT: vslh v2, v2, v5
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; CHECK-NEXT: vsrah v2, v2, v5
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; CHECK-NEXT: xxsel v2, vs1, vs0, v2
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; CHECK-NEXT: blr
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entry:
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%not = xor <8 x i16> %C, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector not operation
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%xor = xor <8 x i16> %B, %C
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%eqv = xor <8 x i16> %xor, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector eqv operation
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%res = select <8 x i1> %A, <8 x i16> %not, <8 x i16> %eqv
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ret <8 x i16> %res
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}
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; Function to test ternary(A, nand(B, C), eqv(B, C)) for <4 x i32>
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define <4 x i32> @ternary_A_nand_BC_eqv_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
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; CHECK-LABEL: ternary_A_nand_BC_eqv_BC_4x32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxleqv v5, v5, v5
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; CHECK-NEXT: xxlnand vs0, v3, v4
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; CHECK-NEXT: xxleqv vs1, v3, v4
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; CHECK-NEXT: vslw v2, v2, v5
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; CHECK-NEXT: vsraw v2, v2, v5
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; CHECK-NEXT: xxsel v2, vs1, vs0, v2
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; CHECK-NEXT: blr
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entry:
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%and = and <4 x i32> %B, %C
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%nand = xor <4 x i32> %and, <i32 -1, i32 -1, i32 -1, i32 -1> ; Vector nand operation
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%xor = xor <4 x i32> %B, %C
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%eqv = xor <4 x i32> %xor, <i32 -1, i32 -1, i32 -1, i32 -1> ; Vector eqv operation
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%res = select <4 x i1> %A, <4 x i32> %nand, <4 x i32> %eqv
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ret <4 x i32> %res
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}
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; Function to test ternary(A, nand(B, C), eqv(B, C)) for <2 x i64>
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define <2 x i64> @ternary_A_nand_BC_eqv_BC_2x64(<2 x i1> %A, <2 x i64> %B, <2 x i64> %C) {
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; CHECK-LABEL: ternary_A_nand_BC_eqv_BC_2x64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxlxor v5, v5, v5
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; CHECK-NEXT: xxlnand vs0, v3, v4
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; CHECK-NEXT: xxleqv vs1, v3, v4
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; CHECK-NEXT: xxsplti32dx v5, 1, 63
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; CHECK-NEXT: vsld v2, v2, v5
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; CHECK-NEXT: vsrad v2, v2, v5
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; CHECK-NEXT: xxsel v2, vs1, vs0, v2
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; CHECK-NEXT: blr
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entry:
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%and = and <2 x i64> %B, %C
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%nand = xor <2 x i64> %and, <i64 -1, i64 -1> ; Vector nand operation
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%xor = xor <2 x i64> %B, %C
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%eqv = xor <2 x i64> %xor, <i64 -1, i64 -1> ; Vector eqv operation
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%res = select <2 x i1> %A, <2 x i64> %nand, <2 x i64> %eqv
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ret <2 x i64> %res
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}
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; Function to test ternary(A, nand(B, C), eqv(B, C)) for <16 x i8>
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define <16 x i8> @ternary_A_nand_BC_eqv_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
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; CHECK-LABEL: ternary_A_nand_BC_eqv_BC_16x8:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxspltib v5, 7
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; CHECK-NEXT: xxlnand vs0, v3, v4
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; CHECK-NEXT: xxleqv vs1, v3, v4
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; CHECK-NEXT: vslb v2, v2, v5
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; CHECK-NEXT: vsrab v2, v2, v5
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; CHECK-NEXT: xxsel v2, vs1, vs0, v2
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; CHECK-NEXT: blr
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entry:
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%and = and <16 x i8> %B, %C
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%nand = xor <16 x i8> %and, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector nand operation
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%xor = xor <16 x i8> %B, %C
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%eqv = xor <16 x i8> %xor, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector eqv operation
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%res = select <16 x i1> %A, <16 x i8> %nand, <16 x i8> %eqv
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ret <16 x i8> %res
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}
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; Function to test ternary(A, nand(B, C), eqv(B, C)) for <8 x i16>
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define <8 x i16> @ternary_A_nand_BC_eqv_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
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; CHECK-LABEL: ternary_A_nand_BC_eqv_BC_8x16:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxspltiw v5, 983055
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; CHECK-NEXT: xxlnand vs0, v3, v4
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; CHECK-NEXT: xxleqv vs1, v3, v4
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; CHECK-NEXT: vslh v2, v2, v5
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; CHECK-NEXT: vsrah v2, v2, v5
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; CHECK-NEXT: xxsel v2, vs1, vs0, v2
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; CHECK-NEXT: blr
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entry:
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%and = and <8 x i16> %B, %C
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%nand = xor <8 x i16> %and, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector nand operation
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%xor = xor <8 x i16> %B, %C
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%eqv = xor <8 x i16> %xor, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector eqv operation
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%res = select <8 x i1> %A, <8 x i16> %nand, <8 x i16> %eqv
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ret <8 x i16> %res
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}

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