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zhaoqi5zhaoqi5
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[LoongArch][NFC] Add more tests for vselect (#163375)
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‎llvm/test/CodeGen/LoongArch/lasx/vselect.ll‎

Lines changed: 122 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,40 @@ define void @select_v32i8(ptr %res, ptr %a0, ptr %a1) nounwind {
3232
ret void
3333
}
3434

35+
define void @select_v32i8_1(ptr %res, ptr %a0, ptr %a1) nounwind {
36+
; CHECK-LABEL: select_v32i8_1:
37+
; CHECK: # %bb.0:
38+
; CHECK-NEXT: xvld $xr0, $a1, 0
39+
; CHECK-NEXT: xvld $xr1, $a2, 0
40+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI2_0)
41+
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI2_0)
42+
; CHECK-NEXT: xvbitsel.v $xr0, $xr1, $xr0, $xr2
43+
; CHECK-NEXT: xvst $xr0, $a0, 0
44+
; CHECK-NEXT: ret
45+
%v0 = load <32 x i8>, ptr %a0
46+
%v1 = load <32 x i8>, ptr %a1
47+
%sel = select <32 x i1> <i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>, <32 x i8> %v0, <32 x i8> %v1
48+
store <32 x i8> %sel, ptr %res
49+
ret void
50+
}
51+
52+
define void @select_v32i8_2(ptr %res, ptr %a0, ptr %a1) nounwind {
53+
; CHECK-LABEL: select_v32i8_2:
54+
; CHECK: # %bb.0:
55+
; CHECK-NEXT: xvld $xr0, $a1, 0
56+
; CHECK-NEXT: xvld $xr1, $a2, 0
57+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI3_0)
58+
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI3_0)
59+
; CHECK-NEXT: xvbitsel.v $xr0, $xr1, $xr0, $xr2
60+
; CHECK-NEXT: xvst $xr0, $a0, 0
61+
; CHECK-NEXT: ret
62+
%v0 = load <32 x i8>, ptr %a0
63+
%v1 = load <32 x i8>, ptr %a1
64+
%sel = select <32 x i1> <i1 false, i1 true, i1 true, i1 true, i1 false, i1 true, i1 true, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true>, <32 x i8> %v0, <32 x i8> %v1
65+
store <32 x i8> %sel, ptr %res
66+
ret void
67+
}
68+
3569
define void @select_v16i16(ptr %res, ptr %a0, ptr %a1) nounwind {
3670
; CHECK-LABEL: select_v16i16:
3771
; CHECK: # %bb.0:
@@ -49,6 +83,40 @@ define void @select_v16i16(ptr %res, ptr %a0, ptr %a1) nounwind {
4983
ret void
5084
}
5185

86+
define void @select_v16i16_1(ptr %res, ptr %a0, ptr %a1) nounwind {
87+
; CHECK-LABEL: select_v16i16_1:
88+
; CHECK: # %bb.0:
89+
; CHECK-NEXT: xvld $xr0, $a1, 0
90+
; CHECK-NEXT: xvld $xr1, $a2, 0
91+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI5_0)
92+
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI5_0)
93+
; CHECK-NEXT: xvbitsel.v $xr0, $xr1, $xr0, $xr2
94+
; CHECK-NEXT: xvst $xr0, $a0, 0
95+
; CHECK-NEXT: ret
96+
%v0 = load <16 x i16>, ptr %a0
97+
%v1 = load <16 x i16>, ptr %a1
98+
%sel = select <16 x i1> <i1 false, i1 false, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <16 x i16> %v0, <16 x i16> %v1
99+
store <16 x i16> %sel, ptr %res
100+
ret void
101+
}
102+
103+
define void @select_v16i16_2(ptr %res, ptr %a0, ptr %a1) nounwind {
104+
; CHECK-LABEL: select_v16i16_2:
105+
; CHECK: # %bb.0:
106+
; CHECK-NEXT: xvld $xr0, $a1, 0
107+
; CHECK-NEXT: xvld $xr1, $a2, 0
108+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI6_0)
109+
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI6_0)
110+
; CHECK-NEXT: xvbitsel.v $xr0, $xr1, $xr0, $xr2
111+
; CHECK-NEXT: xvst $xr0, $a0, 0
112+
; CHECK-NEXT: ret
113+
%v0 = load <16 x i16>, ptr %a0
114+
%v1 = load <16 x i16>, ptr %a1
115+
%sel = select <16 x i1> <i1 false, i1 true, i1 true, i1 true, i1 false, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false, i1 true, i1 true, i1 true, i1 false>, <16 x i16> %v0, <16 x i16> %v1
116+
store <16 x i16> %sel, ptr %res
117+
ret void
118+
}
119+
52120
define void @select_v8i32(ptr %res, ptr %a0, ptr %a1) nounwind {
53121
; CHECK-LABEL: select_v8i32:
54122
; CHECK: # %bb.0:
@@ -65,19 +133,70 @@ define void @select_v8i32(ptr %res, ptr %a0, ptr %a1) nounwind {
65133
ret void
66134
}
67135

136+
define void @select_v8i32_1(ptr %res, ptr %a0, ptr %a1) nounwind {
137+
; CHECK-LABEL: select_v8i32_1:
138+
; CHECK: # %bb.0:
139+
; CHECK-NEXT: xvld $xr0, $a1, 0
140+
; CHECK-NEXT: xvld $xr1, $a2, 0
141+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI8_0)
142+
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI8_0)
143+
; CHECK-NEXT: xvbitsel.v $xr0, $xr1, $xr0, $xr2
144+
; CHECK-NEXT: xvst $xr0, $a0, 0
145+
; CHECK-NEXT: ret
146+
%v0 = load <8 x i32>, ptr %a0
147+
%v1 = load <8 x i32>, ptr %a1
148+
%sel = select <8 x i1> <i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>, <8 x i32> %v0, <8 x i32> %v1
149+
store <8 x i32> %sel, ptr %res
150+
ret void
151+
}
152+
153+
define void @select_v8f32(ptr %res, ptr %a0, ptr %a1) nounwind {
154+
; CHECK-LABEL: select_v8f32:
155+
; CHECK: # %bb.0:
156+
; CHECK-NEXT: xvld $xr0, $a1, 0
157+
; CHECK-NEXT: xvld $xr1, $a2, 0
158+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI9_0)
159+
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI9_0)
160+
; CHECK-NEXT: xvbitsel.v $xr0, $xr1, $xr0, $xr2
161+
; CHECK-NEXT: xvst $xr0, $a0, 0
162+
; CHECK-NEXT: ret
163+
%v0 = load <8 x float>, ptr %a0
164+
%v1 = load <8 x float>, ptr %a1
165+
%sel = select <8 x i1> <i1 false, i1 false, i1 true, i1 false, i1 false, i1 false, i1 true, i1 false>, <8 x float> %v0, <8 x float> %v1
166+
store <8 x float> %sel, ptr %res
167+
ret void
168+
}
169+
68170
define void @select_v4i64(ptr %res, ptr %a0, ptr %a1) nounwind {
69171
; CHECK-LABEL: select_v4i64:
70172
; CHECK: # %bb.0:
71173
; CHECK-NEXT: xvld $xr0, $a1, 0
72174
; CHECK-NEXT: xvld $xr1, $a2, 0
73-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI4_0)
74-
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI4_0)
175+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI10_0)
176+
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI10_0)
75177
; CHECK-NEXT: xvbitsel.v $xr0, $xr1, $xr0, $xr2
76178
; CHECK-NEXT: xvst $xr0, $a0, 0
77179
; CHECK-NEXT: ret
78180
%v0 = load <4 x i64>, ptr %a0
79181
%v1 = load <4 x i64>, ptr %a1
80-
%sel = select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x i64> %v0, <4 x i64> %v1
182+
%sel = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i64> %v0, <4 x i64> %v1
81183
store <4 x i64> %sel, ptr %res
82184
ret void
83185
}
186+
187+
define void @select_v4f64(ptr %res, ptr %a0, ptr %a1) nounwind {
188+
; CHECK-LABEL: select_v4f64:
189+
; CHECK: # %bb.0:
190+
; CHECK-NEXT: xvld $xr0, $a1, 0
191+
; CHECK-NEXT: xvld $xr1, $a2, 0
192+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI11_0)
193+
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI11_0)
194+
; CHECK-NEXT: xvbitsel.v $xr0, $xr1, $xr0, $xr2
195+
; CHECK-NEXT: xvst $xr0, $a0, 0
196+
; CHECK-NEXT: ret
197+
%v0 = load <4 x double>, ptr %a0
198+
%v1 = load <4 x double>, ptr %a1
199+
%sel = select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x double> %v0, <4 x double> %v1
200+
store <4 x double> %sel, ptr %res
201+
ret void
202+
}

‎llvm/test/CodeGen/LoongArch/lsx/vselect.ll‎

Lines changed: 135 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,20 @@ define void @select_v16i8_imm(ptr %res, ptr %a0) nounwind {
1616
ret void
1717
}
1818

19+
define void @select_v16i8_imm_1(ptr %res, ptr %a0) nounwind {
20+
; CHECK-LABEL: select_v16i8_imm_1:
21+
; CHECK: # %bb.0:
22+
; CHECK-NEXT: vld $vr0, $a1, 0
23+
; CHECK-NEXT: vrepli.h $vr1, -256
24+
; CHECK-NEXT: vbitseli.b $vr1, $vr0, 1
25+
; CHECK-NEXT: vst $vr1, $a0, 0
26+
; CHECK-NEXT: ret
27+
%v0 = load <16 x i8>, ptr %a0
28+
%sel = select <16 x i1> <i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true>, <16 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>, <16 x i8> %v0
29+
store <16 x i8> %sel, ptr %res
30+
ret void
31+
}
32+
1933
define void @select_v16i8(ptr %res, ptr %a0, ptr %a1) nounwind {
2034
; CHECK-LABEL: select_v16i8:
2135
; CHECK: # %bb.0:
@@ -32,6 +46,40 @@ define void @select_v16i8(ptr %res, ptr %a0, ptr %a1) nounwind {
3246
ret void
3347
}
3448

49+
define void @select_v16i8_1(ptr %res, ptr %a0, ptr %a1) nounwind {
50+
; CHECK-LABEL: select_v16i8_1:
51+
; CHECK: # %bb.0:
52+
; CHECK-NEXT: vld $vr0, $a1, 0
53+
; CHECK-NEXT: vld $vr1, $a2, 0
54+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI3_0)
55+
; CHECK-NEXT: vld $vr2, $a1, %pc_lo12(.LCPI3_0)
56+
; CHECK-NEXT: vbitsel.v $vr0, $vr1, $vr0, $vr2
57+
; CHECK-NEXT: vst $vr0, $a0, 0
58+
; CHECK-NEXT: ret
59+
%v0 = load <16 x i8>, ptr %a0
60+
%v1 = load <16 x i8>, ptr %a1
61+
%sel = select <16 x i1> <i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <16 x i8> %v0, <16 x i8> %v1
62+
store <16 x i8> %sel, ptr %res
63+
ret void
64+
}
65+
66+
define void @select_v16i8_2(ptr %res, ptr %a0, ptr %a1) nounwind {
67+
; CHECK-LABEL: select_v16i8_2:
68+
; CHECK: # %bb.0:
69+
; CHECK-NEXT: vld $vr0, $a1, 0
70+
; CHECK-NEXT: vld $vr1, $a2, 0
71+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI4_0)
72+
; CHECK-NEXT: vld $vr2, $a1, %pc_lo12(.LCPI4_0)
73+
; CHECK-NEXT: vbitsel.v $vr0, $vr1, $vr0, $vr2
74+
; CHECK-NEXT: vst $vr0, $a0, 0
75+
; CHECK-NEXT: ret
76+
%v0 = load <16 x i8>, ptr %a0
77+
%v1 = load <16 x i8>, ptr %a1
78+
%sel = select <16 x i1> <i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 true, i1 false, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false, i1 false>, <16 x i8> %v0, <16 x i8> %v1
79+
store <16 x i8> %sel, ptr %res
80+
ret void
81+
}
82+
3583
define void @select_v8i16(ptr %res, ptr %a0, ptr %a1) nounwind {
3684
; CHECK-LABEL: select_v8i16:
3785
; CHECK: # %bb.0:
@@ -49,6 +97,40 @@ define void @select_v8i16(ptr %res, ptr %a0, ptr %a1) nounwind {
4997
ret void
5098
}
5199

100+
define void @select_v8i16_1(ptr %res, ptr %a0, ptr %a1) nounwind {
101+
; CHECK-LABEL: select_v8i16_1:
102+
; CHECK: # %bb.0:
103+
; CHECK-NEXT: vld $vr0, $a1, 0
104+
; CHECK-NEXT: vld $vr1, $a2, 0
105+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI6_0)
106+
; CHECK-NEXT: vld $vr2, $a1, %pc_lo12(.LCPI6_0)
107+
; CHECK-NEXT: vbitsel.v $vr0, $vr1, $vr0, $vr2
108+
; CHECK-NEXT: vst $vr0, $a0, 0
109+
; CHECK-NEXT: ret
110+
%v0 = load <8 x i16>, ptr %a0
111+
%v1 = load <8 x i16>, ptr %a1
112+
%sel = select <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false>, <8 x i16> %v0, <8 x i16> %v1
113+
store <8 x i16> %sel, ptr %res
114+
ret void
115+
}
116+
117+
define void @select_v8i16_2(ptr %res, ptr %a0, ptr %a1) nounwind {
118+
; CHECK-LABEL: select_v8i16_2:
119+
; CHECK: # %bb.0:
120+
; CHECK-NEXT: vld $vr0, $a1, 0
121+
; CHECK-NEXT: vld $vr1, $a2, 0
122+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI7_0)
123+
; CHECK-NEXT: vld $vr2, $a1, %pc_lo12(.LCPI7_0)
124+
; CHECK-NEXT: vbitsel.v $vr0, $vr1, $vr0, $vr2
125+
; CHECK-NEXT: vst $vr0, $a0, 0
126+
; CHECK-NEXT: ret
127+
%v0 = load <8 x i16>, ptr %a0
128+
%v1 = load <8 x i16>, ptr %a1
129+
%sel = select <8 x i1> <i1 false, i1 false, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false>, <8 x i16> %v0, <8 x i16> %v1
130+
store <8 x i16> %sel, ptr %res
131+
ret void
132+
}
133+
52134
define void @select_v4i32(ptr %res, ptr %a0, ptr %a1) nounwind {
53135
; CHECK-LABEL: select_v4i32:
54136
; CHECK: # %bb.0:
@@ -65,13 +147,47 @@ define void @select_v4i32(ptr %res, ptr %a0, ptr %a1) nounwind {
65147
ret void
66148
}
67149

150+
define void @select_v4i32_1(ptr %res, ptr %a0, ptr %a1) nounwind {
151+
; CHECK-LABEL: select_v4i32_1:
152+
; CHECK: # %bb.0:
153+
; CHECK-NEXT: vld $vr0, $a1, 0
154+
; CHECK-NEXT: vld $vr1, $a2, 0
155+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI9_0)
156+
; CHECK-NEXT: vld $vr2, $a1, %pc_lo12(.LCPI9_0)
157+
; CHECK-NEXT: vbitsel.v $vr0, $vr1, $vr0, $vr2
158+
; CHECK-NEXT: vst $vr0, $a0, 0
159+
; CHECK-NEXT: ret
160+
%v0 = load <4 x i32>, ptr %a0
161+
%v1 = load <4 x i32>, ptr %a1
162+
%sel = select <4 x i1> <i1 true, i1 true, i1 false, i1 false>, <4 x i32> %v0, <4 x i32> %v1
163+
store <4 x i32> %sel, ptr %res
164+
ret void
165+
}
166+
167+
define void @select_v4f32(ptr %res, ptr %a0, ptr %a1) nounwind {
168+
; CHECK-LABEL: select_v4f32:
169+
; CHECK: # %bb.0:
170+
; CHECK-NEXT: vld $vr0, $a1, 0
171+
; CHECK-NEXT: vld $vr1, $a2, 0
172+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI10_0)
173+
; CHECK-NEXT: vld $vr2, $a1, %pc_lo12(.LCPI10_0)
174+
; CHECK-NEXT: vbitsel.v $vr0, $vr1, $vr0, $vr2
175+
; CHECK-NEXT: vst $vr0, $a0, 0
176+
; CHECK-NEXT: ret
177+
%v0 = load <4 x float>, ptr %a0
178+
%v1 = load <4 x float>, ptr %a1
179+
%sel = select <4 x i1> <i1 false, i1 true, i1 true, i1 true>, <4 x float> %v0, <4 x float> %v1
180+
store <4 x float> %sel, ptr %res
181+
ret void
182+
}
183+
68184
define void @select_v2i64(ptr %res, ptr %a0, ptr %a1) nounwind {
69185
; CHECK-LABEL: select_v2i64:
70186
; CHECK: # %bb.0:
71187
; CHECK-NEXT: vld $vr0, $a1, 0
72188
; CHECK-NEXT: vld $vr1, $a2, 0
73-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI4_0)
74-
; CHECK-NEXT: vld $vr2, $a1, %pc_lo12(.LCPI4_0)
189+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI11_0)
190+
; CHECK-NEXT: vld $vr2, $a1, %pc_lo12(.LCPI11_0)
75191
; CHECK-NEXT: vbitsel.v $vr0, $vr1, $vr0, $vr2
76192
; CHECK-NEXT: vst $vr0, $a0, 0
77193
; CHECK-NEXT: ret
@@ -81,3 +197,20 @@ define void @select_v2i64(ptr %res, ptr %a0, ptr %a1) nounwind {
81197
store <2 x i64> %sel, ptr %res
82198
ret void
83199
}
200+
201+
define void @select_v2f64(ptr %res, ptr %a0, ptr %a1) nounwind {
202+
; CHECK-LABEL: select_v2f64:
203+
; CHECK: # %bb.0:
204+
; CHECK-NEXT: vld $vr0, $a1, 0
205+
; CHECK-NEXT: vld $vr1, $a2, 0
206+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI12_0)
207+
; CHECK-NEXT: vld $vr2, $a1, %pc_lo12(.LCPI12_0)
208+
; CHECK-NEXT: vbitsel.v $vr0, $vr1, $vr0, $vr2
209+
; CHECK-NEXT: vst $vr0, $a0, 0
210+
; CHECK-NEXT: ret
211+
%v0 = load <2 x double>, ptr %a0
212+
%v1 = load <2 x double>, ptr %a1
213+
%sel = select <2 x i1> <i1 false, i1 true>, <2 x double> %v0, <2 x double> %v1
214+
store <2 x double> %sel, ptr %res
215+
ret void
216+
}

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