Drop labels and IDs

Author: e-kud

llvm/test/TableGen/GlobalISelEmitter/predicated-pattern-order.td

@@ -13,7 +13,7 @@ def aligned_store: PatFrag<(ops node:$v, node:$a), (store $v, $a), [{
   let GISelPredicateCode = [{ return true; }];
 }
 
-// CHECK: GIM_Try, /*On fail goto*//*Label 0*/ GIMT_Encode4(45), // Rule ID 0 //
+// CHECK: GIM_Try
 // CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_STORE),
 // CHECK-NEXT: GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
@@ -28,9 +28,9 @@ def aligned_store: PatFrag<(ops node:$v, node:$a), (store $v, $a), [{
 // CHECK-NEXT: // (st GPR32:{ *:[i32] }:$src0, GPR32:{ *:[i32] }:$src1)<<P:Predicate_unindexedstore>><<P:Predicate_store>><<P:Predicate_aligned_store>>  =>  (MOVALIGNED GPR32:{ *:[i32] }:$src0, GPR32:{ *:[i32] }:$src1)
 // CHECK-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::MOVALIGNED),
 // CHECK-NEXT: GIR_RootConstrainSelectedInstOperands,
-// CHECK-NEXT: // GIR_Coverage, 0,
+// CHECK-NEXT: // GIR_Coverage
 
-// CHECK: GIM_Try, /*On fail goto*//*Label 1*/ GIMT_Encode4(86), // Rule ID 1 //
+// CHECK: GIM_Try
 // CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
 // CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_STORE),
 // CHECK-NEXT: GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
@@ -44,15 +44,15 @@ def aligned_store: PatFrag<(ops node:$v, node:$a), (store $v, $a), [{
 // CHECK-NEXT: // (st GPR32:{ *:[i32] }:$src0, GPR32:{ *:[i32] }:$src1)<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (MOVUNALIGNED GPR32:{ *:[i32] }:$src0, GPR32:{ *:[i32] }:$src1)
 // CHECK-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::MOVUNALIGNED),
 // CHECK-NEXT: GIR_RootConstrainSelectedInstOperands,
-// CHECK-NEXT: // GIR_Coverage, 1,
+// CHECK-NEXT: // GIR_Coverage
 
-// OPT: GIM_Try, /*On fail goto*//*Label 0*/ GIMT_Encode4(72),
+// OPT: GIM_Try
 // OPT-NEXT: GIM_CheckOpcode, /*MI*/0, GIMT_Encode2(TargetOpcode::G_STORE),
 // OPT-NEXT: GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
 // OPT-NEXT: GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
 // OPT-NEXT: GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
 
-// OPT-NEXT: GIM_Try, /*On fail goto*//*Label 1*/ GIMT_Encode4(47), // Rule ID 0 //
+// OPT-NEXT: GIM_Try
 // OPT-NEXT:   GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
 // OPT-NEXT:   // MIs[0] src1
 // OPT-NEXT:   GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
@@ -61,17 +61,17 @@ def aligned_store: PatFrag<(ops node:$v, node:$a), (store $v, $a), [{
 // OPT-NEXT:   // (st GPR32:{ *:[i32] }:$src0, GPR32:{ *:[i32] }:$src1)<<P:Predicate_unindexedstore>><<P:Predicate_store>><<P:Predicate_aligned_store>>  =>  (MOVALIGNED GPR32:{ *:[i32] }:$src0, GPR32:{ *:[i32] }:$src1)
 // OPT-NEXT:   GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::MOVALIGNED),
 // OPT-NEXT:   GIR_RootConstrainSelectedInstOperands,
-// OPT-NEXT:   // GIR_Coverage, 0,
+// OPT-NEXT:   // GIR_Coverage
 
-// OPT:      GIM_Try, /*On fail goto*//*Label 2*/ GIMT_Encode4(71), // Rule ID 1 //
+// OPT:      GIM_Try
 // OPT-NEXT:   GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
 // OPT-NEXT:   // MIs[0] src1
 // OPT-NEXT:   GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
 // OPT-NEXT:   GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(MyTarget::GPR32RegClassID),
 // OPT-NEXT:   // (st GPR32:{ *:[i32] }:$src0, GPR32:{ *:[i32] }:$src1)<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (MOVUNALIGNED GPR32:{ *:[i32] }:$src0, GPR32:{ *:[i32] }:$src1)
 // OPT-NEXT:   GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(MyTarget::MOVUNALIGNED),
 // OPT-NEXT:   GIR_RootConstrainSelectedInstOperands,
-// OPT-NEXT:   // GIR_Coverage, 1,
+// OPT-NEXT:   // GIR_Coverage
 
 def MOVALIGNED : I<(outs), (ins GPR32:$src0, GPR32:$src1),
     [(aligned_store GPR32:$src0, GPR32:$src1)]>;