Skip to content

Commit 3180f0f

Browse files
committed
review comments:
- add constrainAllUses to first spirv op - update testcase for ease of reading - use enum instead of int equivalent for documentation
1 parent e3683d5 commit 3180f0f

File tree

2 files changed

+7
-10
lines changed

2 files changed

+7
-10
lines changed
Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,22 +1,18 @@
11
// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -triple \
22
// RUN: dxil-pc-shadermodel6.3-compute %s -emit-llvm -disable-llvm-passes -o - | \
3-
// RUN: FileCheck %s --check-prefixes=CHECK,CHECK-DXIL
3+
// RUN: FileCheck %s -DTARGET=dx
44
// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -triple \
55
// RUN: spirv-pc-vulkan-compute %s -emit-llvm -disable-llvm-passes -o - | \
6-
// RUN: FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV
6+
// RUN: FileCheck %s -DTARGET=spv
77

88
// Test basic lowering to runtime function call.
99

1010
// CHECK-LABEL: test_bool
1111
int test_bool(bool expr) {
12-
// CHECK-SPIRV: %[[#entry_tok:]] = call token @llvm.experimental.convergence.entry()
13-
// CHECK-SPIRV: %[[RET:.*]] = call spir_func i32 @llvm.spv.wave.active.countbits(i1 %{{.*}}) [ "convergencectrl"(token %[[#entry_tok]]) ]
14-
// CHECK-DXIL: %[[RET:.*]] = call i32 @llvm.dx.wave.active.countbits(i1 %{{.*}})
15-
// CHECK: ret i32 %[[RET]]
12+
// CHECK: call {{.*}} @llvm.[[TARGET]].wave.active.countbits
1613
return WaveActiveCountBits(expr);
1714
}
1815

19-
// CHECK-DXIL: declare i32 @llvm.dx.wave.active.countbits(i1) #[[#attr:]]
20-
// CHECK-SPIRV: declare i32 @llvm.spv.wave.active.countbits(i1) #[[#attr:]]
16+
// CHECK: declare i32 @llvm.[[TARGET]].wave.active.countbits(i1) #[[#attr:]]
2117

2218
// CHECK: attributes #[[#attr]] = {{{.*}} convergent {{.*}}}

llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1935,15 +1935,16 @@ bool SPIRVInstructionSelector::selectWaveActiveCountBits(
19351935
.addDef(BallotReg)
19361936
.addUse(GR.getSPIRVTypeID(BallotType))
19371937
.addUse(GR.getOrCreateConstInt(SPIRV::Scope::Subgroup, I, IntTy, TII))
1938-
.addUse(I.getOperand(2).getReg());
1938+
.addUse(I.getOperand(2).getReg())
1939+
.constrainAllUses(TII, TRI, RBI);
19391940

19401941
Result |=
19411942
BuildMI(BB, I, I.getDebugLoc(),
19421943
TII.get(SPIRV::OpGroupNonUniformBallotBitCount))
19431944
.addDef(ResVReg)
19441945
.addUse(GR.getSPIRVTypeID(ResType))
19451946
.addUse(GR.getOrCreateConstInt(SPIRV::Scope::Subgroup, I, IntTy, TII))
1946-
.addImm(0)
1947+
.addImm(SPIRV::GroupOperation::Reduce)
19471948
.addUse(BallotReg)
19481949
.constrainAllUses(TII, TRI, RBI);
19491950

0 commit comments

Comments
 (0)