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[RISCV] Sink hasSideEffects, mayLoad, mayStore from defs to classes in RISCVInstrInfo.td. NFC
This is consistent with how RISCVInstrInfo.td is generally structured.
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‎llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td‎

Lines changed: 31 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,8 @@
1010
//
1111
//===----------------------------------------------------------------------===//
1212

13-
let DecoderNamespace = "XCV" in {
13+
let DecoderNamespace = "XCV",
14+
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
1415
class CVInstBitManipRII<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
1516
string opcodestr, string argstr>
1617
: RVInstIBase<funct3, OPC_CUSTOM_2, outs, ins, opcodestr, argstr> {
@@ -36,10 +37,9 @@ let DecoderNamespace = "XCV" in {
3637
(ins GPR:$rs1), opcodestr, "$rd, $rs1"> {
3738
let rs2 = 0b00000;
3839
}
39-
}
40+
} // DecoderNamespace = "XCV", hasSideEffects = 0, mayLoad = 0, mayStore = 0
4041

41-
let Predicates = [HasVendorXCVbitmanip, IsRV32],
42-
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
42+
let Predicates = [HasVendorXCVbitmanip, IsRV32] in {
4343
def CV_EXTRACT : CVBitManipRII<0b00, 0b000, "cv.extract">;
4444
def CV_EXTRACTU : CVBitManipRII<0b01, 0b000, "cv.extractu">;
4545

@@ -54,7 +54,8 @@ let Predicates = [HasVendorXCVbitmanip, IsRV32],
5454
def CV_INSERT : CVInstBitManipRII<0b10, 0b000, (outs GPR:$rd_wb),
5555
(ins GPR:$rd, GPR:$rs1, uimm5:$is3, uimm5:$is2),
5656
"cv.insert", "$rd, $rs1, $is3, $is2">;
57-
let DecoderNamespace = "XCV" in
57+
let DecoderNamespace = "XCV",
58+
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
5859
def CV_INSERTR : RVInstR<0b0011010, 0b011, OPC_CUSTOM_1, (outs GPR:$rd_wb),
5960
(ins GPR:$rd, GPR:$rs1, GPR:$rs2),
6061
"cv.insertr", "$rd, $rs1, $rs2">;
@@ -70,6 +71,7 @@ let Predicates = [HasVendorXCVbitmanip, IsRV32],
7071
def CV_CNT : CVBitManipR<0b0100100, "cv.cnt">;
7172
}
7273

74+
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
7375
class CVInstMac<bits<7> funct7, bits<3> funct3, string opcodestr>
7476
: RVInstR<funct7, funct3, OPC_CUSTOM_1,
7577
(outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
@@ -89,6 +91,7 @@ class CVInstMacMulN<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
8991
let DecoderNamespace = "XCV";
9092
}
9193

94+
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
9295
class CVInstMacN<bits<2> funct2, bits<3> funct3, string opcodestr>
9396
: CVInstMacMulN<funct2, funct3, (outs GPR:$rd_wb),
9497
(ins GPR:$rd, GPR:$rs1, GPR:$rs2, uimm5:$imm5), opcodestr> {
@@ -98,9 +101,9 @@ class CVInstMacN<bits<2> funct2, bits<3> funct3, string opcodestr>
98101
class CVInstMulN<bits<2> funct2, bits<3> funct3, string opcodestr>
99102
: CVInstMacMulN<funct2, funct3, (outs GPR:$rd),
100103
(ins GPR:$rs1, GPR:$rs2, uimm5:$imm5), opcodestr>;
104+
} // hasSideEffects = 0, mayLoad = 0, mayStore = 0
101105

102-
let Predicates = [HasVendorXCVmac, IsRV32], hasSideEffects = 0, mayLoad = 0,
103-
mayStore = 0 in {
106+
let Predicates = [HasVendorXCVmac, IsRV32] in {
104107
// 32x32 bit macs
105108
def CV_MAC : CVInstMac<0b1001000, 0b011, "cv.mac">,
106109
Sched<[]>;
@@ -126,9 +129,7 @@ let Predicates = [HasVendorXCVmac, IsRV32], hasSideEffects = 0, mayLoad = 0,
126129
Sched<[]>;
127130
def CV_MACHHURN : CVInstMacN<0b11, 0b111, "cv.machhurn">,
128131
Sched<[]>;
129-
} // Predicates = [HasVendorXCVmac, IsRV32], hasSideEffects = 0, mayLoad = 0...
130132

131-
let Predicates = [HasVendorXCVmac, IsRV32], hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
132133
// Signed 16x16 bit muls with imm
133134
def CV_MULSN : CVInstMulN<0b00, 0b100, "cv.mulsn">,
134135
Sched<[]>;
@@ -148,9 +149,7 @@ let Predicates = [HasVendorXCVmac, IsRV32], hasSideEffects = 0, mayLoad = 0, may
148149
Sched<[]>;
149150
def CV_MULHHURN : CVInstMulN<0b11, 0b101, "cv.mulhhurn">,
150151
Sched<[]>;
151-
} // Predicates = [HasVendorXCVmac, IsRV32], hasSideEffects = 0, mayLoad = 0...
152152

153-
let Predicates = [HasVendorXCVmac, IsRV32] in {
154153
// Xcvmac Pseudo Instructions
155154
// Signed 16x16 bit muls
156155
def : InstAlias<"cv.muls $rd1, $rs1, $rs2",
@@ -165,7 +164,8 @@ let Predicates = [HasVendorXCVmac, IsRV32] in {
165164
(CV_MULHHUN GPR:$rd1, GPR:$rs1, GPR:$rs2, 0)>;
166165
} // Predicates = [HasVendorXCVmac, IsRV32]
167166

168-
let DecoderNamespace = "XCV" in {
167+
let DecoderNamespace = "XCV",
168+
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
169169
class CVInstAluRRI<bits<2> funct2, bits<3> funct3, string opcodestr>
170170
: RVInstRBase<funct3, OPC_CUSTOM_2, (outs GPR:$rd),
171171
(ins GPR:$rs1, GPR:$rs2, uimm5:$imm5), opcodestr,
@@ -204,8 +204,7 @@ let DecoderNamespace = "XCV" in {
204204

205205
} // DecoderNamespace = "XCV"
206206

207-
let Predicates = [HasVendorXCValu, IsRV32],
208-
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
207+
let Predicates = [HasVendorXCValu, IsRV32] in {
209208
// General ALU Operations
210209
def CV_ABS : CVInstAluR<0b0101000, 0b011, "cv.abs">,
211210
Sched<[]>;
@@ -255,11 +254,7 @@ let Predicates = [HasVendorXCValu, IsRV32],
255254
Sched<[]>;
256255
def CV_SUBURN : CVInstAluRRI<0b11, 0b011, "cv.suburn">,
257256
Sched<[]>;
258-
} // Predicates = [HasVendorXCValu, IsRV32],
259-
// hasSideEffects = 0, mayLoad = 0, mayStore = 0
260257

261-
let Predicates = [HasVendorXCValu, IsRV32],
262-
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
263258
def CV_ADDNR : CVInstAluRRNR<0b1000000, 0b011, "cv.addnr">,
264259
Sched<[]>;
265260
def CV_ADDUNR : CVInstAluRRNR<0b1000001, 0b011, "cv.addunr">,
@@ -277,8 +272,7 @@ let Predicates = [HasVendorXCValu, IsRV32],
277272
def CV_SUBURNR : CVInstAluRRNR<0b1000111, 0b011, "cv.suburnr">,
278273
Sched<[]>;
279274

280-
} // Predicates = [HasVendorXCValu, IsRV32],
281-
// hasSideEffects = 0, mayLoad = 0, mayStore = 0,
275+
} // Predicates = [HasVendorXCValu, IsRV32]
282276

283277
let Predicates = [HasVendorXCValu, IsRV32] in {
284278
def : MnemonicAlias<"cv.slet", "cv.sle">;
@@ -307,6 +301,7 @@ class CVInstSIMDRI<bits<5> funct5, bit F, bits<3> funct3, RISCVOpcode opcode,
307301
let DecoderNamespace = "XCV";
308302
}
309303

304+
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
310305
class CVSIMDRR<bits<5> funct5, bit F, bit funct1, bits<3> funct3,
311306
string opcodestr>
312307
: CVInstSIMDRR<funct5, F, funct1, funct3, OPC_CUSTOM_3, (outs GPR:$rd),
@@ -350,6 +345,7 @@ class CVSIMDR<bits<5> funct5, bit F, bit funct1, bits<3> funct3,
350345
(ins GPR:$rs1), opcodestr, "$rd, $rs1"> {
351346
let rs2 = 0b00000;
352347
}
348+
} // hasSideEffects = 0, mayLoad = 0, mayStore = 0
353349

354350
multiclass CVSIMDBinarySigned<bits<5> funct5, bit F, bit funct1, string mnemonic> {
355351
def CV_ # NAME # _H : CVSIMDRR<funct5, F, funct1, 0b000, "cv." # mnemonic # ".h">;
@@ -397,8 +393,7 @@ multiclass CVSIMDBinaryUnsignedWb<bits<5> funct5, bit F, bit funct1, string mnem
397393
}
398394

399395

400-
let Predicates = [HasVendorXCVsimd, IsRV32],
401-
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
396+
let Predicates = [HasVendorXCVsimd, IsRV32] in {
402397
defm ADD : CVSIMDBinarySigned<0b00000, 0, 0, "add">;
403398
defm SUB : CVSIMDBinarySigned<0b00001, 0, 0, "sub">;
404399
defm AVG : CVSIMDBinarySigned<0b00010, 0, 0, "avg">;
@@ -495,16 +490,18 @@ let Predicates = [HasVendorXCVsimd, IsRV32],
495490
def CV_SUB_DIV8 : CVSIMDRR<0b01110, 1, 0, 0b110, "cv.sub.div8">;
496491
}
497492

493+
let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
498494
class CVInstImmBranch<bits<3> funct3, dag outs, dag ins,
499495
string opcodestr, string argstr>
500496
: RVInstB<funct3, OPC_CUSTOM_0, outs, ins, opcodestr, argstr> {
501497
bits<5> imm5;
502498
let rs2 = imm5;
499+
let isBranch = 1;
500+
let isTerminator = 1;
503501
let DecoderNamespace = "XCV";
504502
}
505503

506-
let Predicates = [HasVendorXCVbi, IsRV32], hasSideEffects = 0, mayLoad = 0,
507-
mayStore = 0, isBranch = 1, isTerminator = 1 in {
504+
let Predicates = [HasVendorXCVbi, IsRV32] in {
508505
// Immediate branching operations
509506
def CV_BEQIMM : CVInstImmBranch<0b110, (outs),
510507
(ins GPR:$rs1, simm5:$imm5, simm13_lsb0:$imm12),
@@ -530,15 +527,18 @@ def CVrr : Operand<i32>,
530527
let MIOperandInfo = (ops GPR:$base, GPR:$offset);
531528
}
532529

530+
let hasSideEffects = 0, mayLoad = 1, mayStore = 0 in {
533531
class CVLoad_ri_inc<bits<3> funct3, string opcodestr>
534-
: RVInstI<funct3, OPC_CUSTOM_0, (outs GPR:$rd, GPR:$rs1_wb), (ins GPRMem:$rs1, simm12:$imm12),
532+
: RVInstI<funct3, OPC_CUSTOM_0, (outs GPR:$rd, GPR:$rs1_wb),
533+
(ins GPRMem:$rs1, simm12:$imm12),
535534
opcodestr, "$rd, (${rs1}), ${imm12}"> {
536535
let Constraints = "$rs1_wb = $rs1";
537536
let DecoderNamespace = "XCV";
538537
}
539538

540539
class CVLoad_rr_inc<bits<7> funct7, bits<3> funct3, string opcodestr>
541-
: RVInstR<funct7, funct3, OPC_CUSTOM_1, (outs GPR:$rd, GPR:$rs1_wb), (ins GPRMem:$rs1, GPR:$rs2),
540+
: RVInstR<funct7, funct3, OPC_CUSTOM_1, (outs GPR:$rd, GPR:$rs1_wb),
541+
(ins GPRMem:$rs1, GPR:$rs2),
542542
opcodestr, "$rd, (${rs1}), ${rs2}"> {
543543
let Constraints = "$rs1_wb = $rs1";
544544
let DecoderNamespace = "XCV";
@@ -557,9 +557,9 @@ class CVLoad_rr<bits<7> funct7, bits<3> funct3, string opcodestr>
557557
let Inst{11-7} = rd;
558558
let DecoderNamespace = "XCV";
559559
}
560+
} // hasSideEffects = 0, mayLoad = 1, mayStore = 0
560561

561-
let Predicates = [HasVendorXCVmem, IsRV32], hasSideEffects = 0, mayLoad = 1,
562-
mayStore = 0 in {
562+
let Predicates = [HasVendorXCVmem, IsRV32] in {
563563
// Register-Immediate load with post-increment
564564
def CV_LB_ri_inc : CVLoad_ri_inc<0b000, "cv.lb">;
565565
def CV_LBU_ri_inc : CVLoad_ri_inc<0b100, "cv.lbu">;
@@ -582,6 +582,7 @@ let Predicates = [HasVendorXCVmem, IsRV32], hasSideEffects = 0, mayLoad = 1,
582582
def CV_LW_rr : CVLoad_rr<0b0000110, 0b011, "cv.lw">;
583583
}
584584

585+
let hasSideEffects = 0, mayLoad = 0, mayStore = 1 in {
585586
class CVStore_ri_inc<bits<3> funct3, string opcodestr>
586587
: RVInstS<funct3, OPC_CUSTOM_1, (outs GPR:$rs1_wb),
587588
(ins GPR:$rs2, GPR:$rs1, simm12:$imm12),
@@ -622,9 +623,9 @@ class CVStore_rr<bits<3> funct3, bits<7> funct7, string opcodestr>
622623
let Inst{6-0} = OPC_CUSTOM_1.Value;
623624
let DecoderNamespace = "XCV";
624625
}
626+
} // hasSideEffects = 0, mayLoad = 0, mayStore = 1
625627

626-
let Predicates = [HasVendorXCVmem, IsRV32], hasSideEffects = 0, mayLoad = 0,
627-
mayStore = 1 in {
628+
let Predicates = [HasVendorXCVmem, IsRV32] in {
628629
// Register-Immediate store with post-increment
629630
def CV_SB_ri_inc : CVStore_ri_inc<0b000, "cv.sb">;
630631
def CV_SH_ri_inc : CVStore_ri_inc<0b001, "cv.sh">;

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