@@ -27,9 +27,10 @@ static mlir::Value emitIntrinsicCallOp(CIRGenFunction &cgf, const CallExpr *e,
2727 Operands &&...op) {
2828 CIRGenBuilderTy &builder = cgf.getBuilder ();
2929 mlir::Location location = cgf.getLoc (e->getExprLoc ());
30+ llvm::SmallVector<mlir::Value> operands{std::forward<Operands>(op)...};
3031 return cir::LLVMIntrinsicCallOp::create (builder, location,
3132 builder.getStringAttr (str), resTy,
32- std::forward<Operands>(op)... )
33+ operands )
3334 .getResult ();
3435}
3536
@@ -89,13 +90,10 @@ static mlir::Value getMaskVecValue(CIRGenFunction &cgf, const CallExpr *expr,
8990 }
9091 return maskVec;
9192}
92- static mlir::Value emitX86CompressExpand (CIRGenFunction &cgf, const CallExpr *expr,ArrayRef<mlir::Value> ops, bool IsCompress, const std::string &ID){
93- auto ResultTy = cast<cir::VectorType>(ops[1 ].getType ());
94- mlir::Value MaskValue = getMaskVecValue (cgf, expr, ops[2 ], cast<cir::VectorType>(ResultTy).getSize ());
95- llvm::SmallVector<mlir::Value, 4 > op{ops[0 ], ops[1 ], MaskValue};
96-
97- return emitIntrinsicCallOp (cgf,expr, ID, ResultTy, op);
98-
93+ static mlir::Value emitX86CompressExpand (CIRGenFunction &cgf, const CallExpr *expr, mlir::Value source, mlir::Value mask, mlir::Value inputVector, const std::string &id){
94+ auto ResultTy = cast<cir::VectorType>(mask.getType ());
95+ mlir::Value MaskValue = getMaskVecValue (cgf, expr, inputVector, cast<cir::VectorType>(ResultTy).getSize ());
96+ return emitIntrinsicCallOp (cgf,expr, id, ResultTy, source, mask, MaskValue);
9997}
10098
10199mlir::Value CIRGenFunction::emitX86BuiltinExpr (unsigned builtinID,
@@ -445,6 +443,10 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
445443 case X86::BI__builtin_ia32_expandqi128_mask:
446444 case X86::BI__builtin_ia32_expandqi256_mask:
447445 case X86::BI__builtin_ia32_expandqi512_mask:
446+ cgm.errorNYI (expr->getSourceRange (),
447+ std::string (" unimplemented X86 builtin call: " ) +
448+ getContext ().BuiltinInfo .getName (builtinID));
449+ return {};
448450 case X86::BI__builtin_ia32_compressdf128_mask:
449451 case X86::BI__builtin_ia32_compressdf256_mask:
450452 case X86::BI__builtin_ia32_compressdf512_mask:
@@ -463,7 +465,7 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
463465 case X86::BI__builtin_ia32_compressqi128_mask:
464466 case X86::BI__builtin_ia32_compressqi256_mask:
465467 case X86::BI__builtin_ia32_compressqi512_mask:{
466- return emitX86CompressExpand (*this , expr, ops, true , " x86_avx512_mask_compress" );
468+ return emitX86CompressExpand (*this , expr, ops[ 0 ], ops[ 1 ], ops[ 2 ] , " x86_avx512_mask_compress" );
467469 }
468470 case X86::BI__builtin_ia32_gather3div2df:
469471 case X86::BI__builtin_ia32_gather3div2di:
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