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Rohit AggarwalRohit Aggarwal
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Move folding logic from DAGCombiner to X86ISelLowering as it is specific to X86
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-75
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2 files changed

+76
-75
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llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 0 additions & 75 deletions
Original file line numberDiff line numberDiff line change
@@ -14295,78 +14295,6 @@ static SDValue widenAbs(SDNode *Extend, SelectionDAG &DAG) {
1429514295
return DAG.getZExtOrTrunc(NewAbs, SDLoc(Extend), VT);
1429614296
}
1429714297

14298-
// Try to widen the build vector and bitcast it to the type of zext.
14299-
// This is a special case for the 128-bit vector types. Intention is to remove
14300-
// the zext and replace it with a bitcast the wider type. While lowering
14301-
// the bitcast is removed and extra commutation due to zext is avoided.
14302-
// For example:
14303-
// zext v4i16 ( v4i8 build_vector (x, y, z, w)) -> bitcast v4i16 ( v8i8
14304-
// build_vector (x, 0, y, 0, z, w, 0)
14305-
static SDValue widenBuildVec(SDNode *Extend, SelectionDAG &DAG) {
14306-
14307-
assert(Extend->getOpcode() == ISD::ZERO_EXTEND && "Expected zero extend.");
14308-
14309-
EVT ExtendVT = Extend->getValueType(0);
14310-
14311-
SDValue BV = Extend->getOperand(0);
14312-
if (BV.getOpcode() != ISD::BUILD_VECTOR || !BV.hasOneUse())
14313-
return SDValue();
14314-
14315-
if (any_of(BV->op_values(), [](SDValue Op) { return Op.isUndef(); })) {
14316-
// If the build vector has undef elements, we cannot widen it.
14317-
// The widening would create a vector with more undef elements, which
14318-
// is not valid.
14319-
return SDValue();
14320-
}
14321-
14322-
if (!all_of(BV->op_values(),
14323-
[](SDValue Op) { return Op.getOpcode() == ISD::LOAD; })) {
14324-
// If the build vector any element other than \ISD::LOAD, we cannot widen
14325-
// it.
14326-
return SDValue();
14327-
}
14328-
14329-
SDLoc dl(BV);
14330-
EVT VT = BV.getValueType();
14331-
EVT EltVT = BV.getOperand(0).getValueType();
14332-
unsigned NumElts = VT.getVectorNumElements();
14333-
14334-
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
14335-
14336-
if (TLI.getTypeAction(*DAG.getContext(), VT) !=
14337-
TargetLowering::TypeWidenVector)
14338-
return SDValue();
14339-
14340-
EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
14341-
unsigned WidenNumElts = WidenVT.getVectorNumElements();
14342-
14343-
SmallVector<SDValue, 16> NewOps(BV->op_begin(), BV->op_end());
14344-
assert(WidenNumElts >= NumElts && "Shrinking vector instead of widening!");
14345-
// Fill the new elements with Zero.
14346-
NewOps.append(WidenNumElts - NumElts, DAG.getConstant(0, dl, EltVT));
14347-
// Compute the step to place the elements in the right place and control the
14348-
// iteration.
14349-
unsigned step = WidenNumElts / NumElts;
14350-
if (WidenVT.is128BitVector()) {
14351-
if (step > 1 && Extend->getValueSizeInBits(0) == WidenVT.getSizeInBits()) {
14352-
for (int i = NumElts - 1, j = WidenNumElts - step; i > 0;
14353-
i--, j -= step) {
14354-
SDValue temp = NewOps[i];
14355-
NewOps[i] = NewOps[j];
14356-
NewOps[j] = temp;
14357-
}
14358-
// Create new build vector with WidenVT and NewOps
14359-
SDValue NewBV = DAG.getBuildVector(WidenVT, dl, NewOps);
14360-
// Replace the old build vector with the new one. Bitcast the
14361-
// new build vector to the type of the zext.
14362-
SDValue NewBVBitcast = DAG.getBitcast(ExtendVT, NewBV);
14363-
DAG.ReplaceAllUsesOfValueWith(SDValue(Extend, 0), NewBVBitcast);
14364-
return NewBV;
14365-
}
14366-
}
14367-
return SDValue();
14368-
}
14369-
1437014298
SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) {
1437114299
SDValue N0 = N->getOperand(0);
1437214300
EVT VT = N->getValueType(0);
@@ -14693,9 +14621,6 @@ SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) {
1469314621
return SDValue(CSENode, 0);
1469414622
}
1469514623

14696-
if (SDValue V = widenBuildVec(N, DAG))
14697-
return V;
14698-
1469914624
return SDValue();
1470014625
}
1470114626

llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 76 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -55936,6 +55936,79 @@ static SDValue combineFMADDSUB(SDNode *N, SelectionDAG &DAG,
5593655936
NegN2);
5593755937
}
5593855938

55939+
// Try to widen the build vector and bitcast it to the type of zext.
55940+
// This is a special case for the 128-bit vector types. Intention is to remove
55941+
// the zext and replace it with a bitcast the wider type. While lowering
55942+
// the bitcast is removed and extra commutation due to zext is avoided.
55943+
// For example:
55944+
// zext v4i16 ( v4i8 build_vector (x, y, z, w)) -> bitcast v4i16 ( v8i8
55945+
// build_vector (x, 0, y, 0, z, w, 0)
55946+
static SDValue widenBuildVec(SDNode *Extend, SelectionDAG &DAG) {
55947+
55948+
if (Extend->getOpcode() != ISD::ZERO_EXTEND)
55949+
return SDValue();
55950+
55951+
EVT ExtendVT = Extend->getValueType(0);
55952+
55953+
SDValue BV = Extend->getOperand(0);
55954+
if (BV.getOpcode() != ISD::BUILD_VECTOR || !BV.hasOneUse())
55955+
return SDValue();
55956+
55957+
if (any_of(BV->op_values(), [](SDValue Op) { return Op.isUndef(); })) {
55958+
// If the build vector has undef elements, we cannot widen it.
55959+
// The widening would create a vector with more undef elements, which
55960+
// is not valid.
55961+
return SDValue();
55962+
}
55963+
55964+
if (!all_of(BV->op_values(),
55965+
[](SDValue Op) { return Op.getOpcode() == ISD::LOAD; })) {
55966+
// If the build vector any element other than \ISD::LOAD, we cannot widen
55967+
// it.
55968+
return SDValue();
55969+
}
55970+
55971+
SDLoc dl(BV);
55972+
EVT VT = BV.getValueType();
55973+
EVT EltVT = BV.getOperand(0).getValueType();
55974+
unsigned NumElts = VT.getVectorNumElements();
55975+
55976+
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
55977+
55978+
if (TLI.getTypeAction(*DAG.getContext(), VT) !=
55979+
TargetLowering::TypeWidenVector)
55980+
return SDValue();
55981+
55982+
EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
55983+
unsigned WidenNumElts = WidenVT.getVectorNumElements();
55984+
55985+
SmallVector<SDValue, 16> NewOps(BV->op_begin(), BV->op_end());
55986+
assert(WidenNumElts >= NumElts && "Shrinking vector instead of widening!");
55987+
// Fill the new elements with Zero.
55988+
NewOps.append(WidenNumElts - NumElts, DAG.getConstant(0, dl, EltVT));
55989+
// Compute the step to place the elements in the right place and control the
55990+
// iteration.
55991+
unsigned step = WidenNumElts / NumElts;
55992+
if (WidenVT.is128BitVector()) {
55993+
if (step > 1 && Extend->getValueSizeInBits(0) == WidenVT.getSizeInBits()) {
55994+
for (int i = NumElts - 1, j = WidenNumElts - step; i > 0;
55995+
i--, j -= step) {
55996+
SDValue temp = NewOps[i];
55997+
NewOps[i] = NewOps[j];
55998+
NewOps[j] = temp;
55999+
}
56000+
// Create new build vector with WidenVT and NewOps
56001+
SDValue NewBV = DAG.getBuildVector(WidenVT, dl, NewOps);
56002+
// Replace the old build vector with the new one. Bitcast the
56003+
// new build vector to the type of the zext.
56004+
SDValue NewBVBitcast = DAG.getBitcast(ExtendVT, NewBV);
56005+
DAG.ReplaceAllUsesOfValueWith(SDValue(Extend, 0), NewBVBitcast);
56006+
return NewBV;
56007+
}
56008+
}
56009+
return SDValue();
56010+
}
56011+
5593956012
static SDValue combineZext(SDNode *N, SelectionDAG &DAG,
5594056013
TargetLowering::DAGCombinerInfo &DCI,
5594156014
const X86Subtarget &Subtarget) {
@@ -55995,6 +56068,9 @@ static SDValue combineZext(SDNode *N, SelectionDAG &DAG,
5599556068
}
5599656069
}
5599756070

56071+
if (SDValue V = widenBuildVec(N, DAG))
56072+
return V;
56073+
5599856074
return SDValue();
5599956075
}
5600056076

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