Skip to content

Commit 327aaed

Browse files
pskrgagpskrgag
committed
review
1 parent 0e9e8e7 commit 327aaed

File tree

2 files changed

+115
-33
lines changed

2 files changed

+115
-33
lines changed

‎llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp‎

Lines changed: 12 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1323,33 +1323,28 @@ Instruction *InstCombinerImpl::foldICmpWithZero(ICmpInst &Cmp) {
13231323
// Fold icmp eq (num + (val - 1)) & -val, num
13241324
// to
13251325
// icmp eq 0, (and num, val - 1)
1326-
// For value being power of two
1326+
// For val being power of two
13271327
Instruction *InstCombinerImpl::foldIsMultipleOfAPowerOfTwo(ICmpInst &Cmp) {
1328-
Value *Neg, *Num, *Mask;
1328+
Value *Num;
13291329
CmpPredicate Pred;
1330-
const APInt *NegConst, *MaskConst;
1330+
const APInt *Mask, *Neg;
13311331

1332-
if (!match(&Cmp, m_c_ICmp(Pred, m_Value(Num),
1333-
m_OneUse(m_c_And(m_OneUse(m_c_Add(m_Deferred(Num),
1334-
m_Value(Mask))),
1335-
m_Value(Neg))))))
1332+
if (!match(&Cmp,
1333+
m_c_ICmp(Pred, m_Value(Num),
1334+
m_OneUse(m_c_And(m_OneUse(m_c_Add(m_Deferred(Num),
1335+
m_LowBitMask(Mask))),
1336+
m_APInt(Neg))))))
13361337
return nullptr;
13371338

1338-
if (!ICmpInst::isEquality(Pred))
1339-
return nullptr;
1340-
1341-
// Check only constant case, since it's the only profitable.
1342-
// See https://github.com/dtcxzyw/llvm-opt-benchmark/pull/2657/
1343-
if (!match(Neg, m_APInt(NegConst)) || !match(Mask, m_LowBitMask(MaskConst)))
1339+
if (*Neg != ~*Mask)
13441340
return nullptr;
13451341

1346-
// Neg = -(Mask + 1)
1347-
if (*NegConst != ~*MaskConst)
1342+
if (!ICmpInst::isEquality(Pred))
13481343
return nullptr;
13491344

13501345
// Create new icmp eq (num & (val - 1)), 0
1351-
auto NewAnd = Builder.CreateAnd(Num, Mask);
1352-
auto Zero = llvm::Constant::getNullValue(Num->getType());
1346+
auto NewAnd = Builder.CreateAnd(Num, *Mask);
1347+
auto Zero = Constant::getNullValue(Num->getType());
13531348

13541349
return new ICmpInst(Pred, NewAnd, Zero);
13551350
}

‎llvm/test/Transforms/InstCombine/icmp-add.ll‎

Lines changed: 103 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -3310,37 +3310,73 @@ define i1 @val_is_aligend_const_pow2(i32 %num) {
33103310
; CHECK-NEXT: ret i1 [[_0]]
33113311
;
33123312
%num.biased = add i32 %num, 4095
3313-
%_2.sroa.0.0 = and i32 %num.biased, -4096
3314-
%_0 = icmp eq i32 %_2.sroa.0.0, %num
3313+
%num.masked = and i32 %num.biased, -4096
3314+
%_0 = icmp eq i32 %num.masked, %num
3315+
ret i1 %_0
3316+
}
3317+
3318+
define i1 @val_is_aligend_const_pow2_add_commute(i32 %num) {
3319+
; CHECK-LABEL: @val_is_aligend_const_pow2_add_commute(
3320+
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[NUM:%.*]], 4095
3321+
; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[TMP1]], 0
3322+
; CHECK-NEXT: ret i1 [[_0]]
3323+
;
3324+
%num.biased = add i32 4095, %num
3325+
%num.masked = and i32 %num.biased, -4096
3326+
%_0 = icmp eq i32 %num.masked, %num
3327+
ret i1 %_0
3328+
}
3329+
3330+
define i1 @val_is_aligend_const_pow2_and_commute(i32 %num) {
3331+
; CHECK-LABEL: @val_is_aligend_const_pow2_and_commute(
3332+
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[NUM:%.*]], 4095
3333+
; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[TMP1]], 0
3334+
; CHECK-NEXT: ret i1 [[_0]]
3335+
;
3336+
%num.biased = add i32 %num, 4095
3337+
%num.masked = and i32 -4096, %num.biased
3338+
%_0 = icmp eq i32 %num.masked, %num
3339+
ret i1 %_0
3340+
}
3341+
3342+
define i1 @val_is_aligend_const_pow2_icm_commute(i32 %num) {
3343+
; CHECK-LABEL: @val_is_aligend_const_pow2_icm_commute(
3344+
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[NUM:%.*]], 4095
3345+
; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[TMP1]], 0
3346+
; CHECK-NEXT: ret i1 [[_0]]
3347+
;
3348+
%num.biased = add i32 %num, 4095
3349+
%num.masked = and i32 %num.biased, -4096
3350+
%_0 = icmp eq i32 %num, %num.masked
33153351
ret i1 %_0
33163352
}
33173353

33183354
; Should not work for non-power-of-two cases
33193355
define i1 @val_is_aligend_const_non_pow2(i32 %num) {
33203356
; CHECK-LABEL: @val_is_aligend_const_non_pow2(
33213357
; CHECK-NEXT: [[NUM_BIASED:%.*]] = add i32 [[NUM:%.*]], 6
3322-
; CHECK-NEXT: [[_2_SROA_0_0:%.*]] = and i32 [[NUM_BIASED]], -7
3323-
; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[_2_SROA_0_0]], [[NUM]]
3358+
; CHECK-NEXT: [[NUM_MASKED:%.*]] = and i32 [[NUM_BIASED]], -7
3359+
; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[NUM_MASKED]], [[NUM]]
33243360
; CHECK-NEXT: ret i1 [[_0]]
33253361
;
33263362
%num.biased = add i32 %num, 6
3327-
%_2.sroa.0.0 = and i32 %num.biased, -7
3328-
%_0 = icmp eq i32 %_2.sroa.0.0, %num
3363+
%num.masked = and i32 %num.biased, -7
3364+
%_0 = icmp eq i32 %num.masked, %num
33293365
ret i1 %_0
33303366
}
33313367

33323368
define i1 @val_is_aligend_const_pow2_multiuse(i32 %num) {
33333369
; CHECK-LABEL: @val_is_aligend_const_pow2_multiuse(
33343370
; CHECK-NEXT: [[NUM_BIASED:%.*]] = add i32 [[NUM:%.*]], 4095
3335-
; CHECK-NEXT: [[_2_SROA_0_0:%.*]] = and i32 [[NUM_BIASED]], -4096
3336-
; CHECK-NEXT: call void @use(i32 [[_2_SROA_0_0]])
3337-
; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[_2_SROA_0_0]], [[NUM]]
3371+
; CHECK-NEXT: [[NUM_MASKED:%.*]] = and i32 [[NUM_BIASED]], -4096
3372+
; CHECK-NEXT: call void @use(i32 [[NUM_MASKED]])
3373+
; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[NUM_MASKED]], [[NUM]]
33383374
; CHECK-NEXT: ret i1 [[_0]]
33393375
;
33403376
%num.biased = add i32 %num, 4095
3341-
%_2.sroa.0.0 = and i32 %num.biased, -4096
3342-
call void @use(i32 %_2.sroa.0.0)
3343-
%_0 = icmp eq i32 %_2.sroa.0.0, %num
3377+
%num.masked = and i32 %num.biased, -4096
3378+
call void @use(i32 %num.masked)
3379+
%_0 = icmp eq i32 %num.masked, %num
33443380
ret i1 %_0
33453381
}
33463382

@@ -3349,13 +3385,64 @@ define i1 @val_is_aligend_const_pow2_multiuse1(i32 %num) {
33493385
; CHECK-LABEL: @val_is_aligend_const_pow2_multiuse1(
33503386
; CHECK-NEXT: [[NUM_BIASED:%.*]] = add i32 [[NUM:%.*]], 4095
33513387
; CHECK-NEXT: call void @use(i32 [[NUM_BIASED]])
3352-
; CHECK-NEXT: [[_2_SROA_0_0:%.*]] = and i32 [[NUM_BIASED]], -4096
3353-
; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[_2_SROA_0_0]], [[NUM]]
3388+
; CHECK-NEXT: [[NUM_MASKED:%.*]] = and i32 [[NUM_BIASED]], -4096
3389+
; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[NUM_MASKED]], [[NUM]]
33543390
; CHECK-NEXT: ret i1 [[_0]]
33553391
;
33563392
%num.biased = add i32 %num, 4095
33573393
call void @use(i32 %num.biased)
3358-
%_2.sroa.0.0 = and i32 %num.biased, -4096
3359-
%_0 = icmp eq i32 %_2.sroa.0.0, %num
3394+
%num.masked = and i32 %num.biased, -4096
3395+
%_0 = icmp eq i32 %num.masked, %num
3396+
ret i1 %_0
3397+
}
3398+
3399+
define i1 @val_is_aligend_const_pow2_ne(i32 %num) {
3400+
; CHECK-LABEL: @val_is_aligend_const_pow2_ne(
3401+
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[NUM:%.*]], 4095
3402+
; CHECK-NEXT: [[_0:%.*]] = icmp ne i32 [[TMP1]], 0
3403+
; CHECK-NEXT: ret i1 [[_0]]
3404+
;
3405+
%num.biased = add i32 %num, 4095
3406+
%num.masked = and i32 %num.biased, -4096
3407+
%_0 = icmp ne i32 %num.masked, %num
3408+
ret i1 %_0
3409+
}
3410+
3411+
define i1 @val_is_aligend_const_mismatch(i32 %num) {
3412+
; CHECK-LABEL: @val_is_aligend_const_mismatch(
3413+
; CHECK-NEXT: [[NUM_BIASED:%.*]] = add i32 [[NUM:%.*]], 4095
3414+
; CHECK-NEXT: [[NUM_MASKED:%.*]] = and i32 [[NUM_BIASED]], -4095
3415+
; CHECK-NEXT: [[_0:%.*]] = icmp ne i32 [[NUM_MASKED]], [[NUM]]
3416+
; CHECK-NEXT: ret i1 [[_0]]
3417+
;
3418+
%num.biased = add i32 %num, 4095
3419+
%num.masked = and i32 %num.biased, -4095
3420+
%_0 = icmp ne i32 %num.masked, %num
3421+
ret i1 %_0
3422+
}
3423+
3424+
define i1 @val_is_aligend_const_mismatch1(i32 %num) {
3425+
; CHECK-LABEL: @val_is_aligend_const_mismatch1(
3426+
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[NUM:%.*]], -4096
3427+
; CHECK-NEXT: [[NUM_MASKED:%.*]] = add i32 [[TMP1]], 4096
3428+
; CHECK-NEXT: [[_0:%.*]] = icmp ne i32 [[NUM_MASKED]], [[NUM]]
3429+
; CHECK-NEXT: ret i1 [[_0]]
3430+
;
3431+
%num.biased = add i32 %num, 4096
3432+
%num.masked = and i32 %num.biased, -4096
3433+
%_0 = icmp ne i32 %num.masked, %num
3434+
ret i1 %_0
3435+
}
3436+
3437+
define i1 @val_is_aligend_pred_mismatch(i32 %num) {
3438+
; CHECK-LABEL: @val_is_aligend_pred_mismatch(
3439+
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[NUM:%.*]], -4096
3440+
; CHECK-NEXT: [[NUM_MASKED:%.*]] = add i32 [[TMP1]], 4096
3441+
; CHECK-NEXT: [[_0:%.*]] = icmp sge i32 [[NUM_MASKED]], [[NUM]]
3442+
; CHECK-NEXT: ret i1 [[_0]]
3443+
;
3444+
%num.biased = add i32 %num, 4096
3445+
%num.masked = and i32 %num.biased, -4096
3446+
%_0 = icmp sge i32 %num.masked, %num
33603447
ret i1 %_0
33613448
}

0 commit comments

Comments
 (0)