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fixup! Add common CHECK prefix.
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6 files changed

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-294
lines changed

6 files changed

+122
-294
lines changed

‎llvm/test/CodeGen/RISCV/rv64-double-convert-strict.ll‎

Lines changed: 39 additions & 71 deletions
Original file line numberDiff line numberDiff line change
@@ -1,95 +1,63 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc -mtriple=riscv64 -verify-machineinstrs -target-abi=lp64 \
3-
; RUN: -disable-strictnode-mutation < %s | FileCheck %s -check-prefix=RV64ID
3+
; RUN: -disable-strictnode-mutation < %s | FileCheck %s -check-prefixes=CHECK,RV64I
44
; RUN: llc -mtriple=riscv64 -mattr=+d -verify-machineinstrs -target-abi=lp64d \
5-
; RUN: -disable-strictnode-mutation < %s | FileCheck %s -check-prefix=RV64ID
5+
; RUN: -disable-strictnode-mutation < %s | FileCheck %s -check-prefixes=CHECK,RV64ID
66
; RUN: llc -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs -target-abi=lp64 \
7-
; RUN: -disable-strictnode-mutation < %s | FileCheck %s -check-prefix=RV64IDINX
7+
; RUN: -disable-strictnode-mutation < %s | FileCheck %s -check-prefixes=CHECK,RV64IDINX
88

99
define i128 @fptosi_f64_to_i128(double %a) nounwind strictfp {
10-
; RV64ID-LABEL: fptosi_f64_to_i128:
11-
; RV64ID: # %bb.0:
12-
; RV64ID-NEXT: addi sp, sp, -16
13-
; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
14-
; RV64ID-NEXT: call __fixdfti
15-
; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
16-
; RV64ID-NEXT: addi sp, sp, 16
17-
; RV64ID-NEXT: ret
18-
;
19-
; RV64IDINX-LABEL: fptosi_f64_to_i128:
20-
; RV64IDINX: # %bb.0:
21-
; RV64IDINX-NEXT: addi sp, sp, -16
22-
; RV64IDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
23-
; RV64IDINX-NEXT: call __fixdfti
24-
; RV64IDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
25-
; RV64IDINX-NEXT: addi sp, sp, 16
26-
; RV64IDINX-NEXT: ret
10+
; CHECK-LABEL: fptosi_f64_to_i128:
11+
; CHECK: # %bb.0:
12+
; CHECK-NEXT: addi sp, sp, -16
13+
; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
14+
; CHECK-NEXT: call __fixdfti
15+
; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
16+
; CHECK-NEXT: addi sp, sp, 16
17+
; CHECK-NEXT: ret
2718
%1 = call i128 @llvm.experimental.constrained.fptosi.i128.f64(double %a, metadata !"fpexcept.strict")
2819
ret i128 %1
2920
}
3021

3122
define i128 @fptoui_f64_to_i128(double %a) nounwind strictfp {
32-
; RV64ID-LABEL: fptoui_f64_to_i128:
33-
; RV64ID: # %bb.0:
34-
; RV64ID-NEXT: addi sp, sp, -16
35-
; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
36-
; RV64ID-NEXT: call __fixunsdfti
37-
; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
38-
; RV64ID-NEXT: addi sp, sp, 16
39-
; RV64ID-NEXT: ret
40-
;
41-
; RV64IDINX-LABEL: fptoui_f64_to_i128:
42-
; RV64IDINX: # %bb.0:
43-
; RV64IDINX-NEXT: addi sp, sp, -16
44-
; RV64IDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
45-
; RV64IDINX-NEXT: call __fixunsdfti
46-
; RV64IDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
47-
; RV64IDINX-NEXT: addi sp, sp, 16
48-
; RV64IDINX-NEXT: ret
23+
; CHECK-LABEL: fptoui_f64_to_i128:
24+
; CHECK: # %bb.0:
25+
; CHECK-NEXT: addi sp, sp, -16
26+
; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
27+
; CHECK-NEXT: call __fixunsdfti
28+
; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
29+
; CHECK-NEXT: addi sp, sp, 16
30+
; CHECK-NEXT: ret
4931
%1 = call i128 @llvm.experimental.constrained.fptoui.i128.f64(double %a, metadata !"fpexcept.strict")
5032
ret i128 %1
5133
}
5234

5335
define double @sitofp_i128_to_f64(i128 %a) nounwind strictfp {
54-
; RV64ID-LABEL: sitofp_i128_to_f64:
55-
; RV64ID: # %bb.0:
56-
; RV64ID-NEXT: addi sp, sp, -16
57-
; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
58-
; RV64ID-NEXT: call __floattidf
59-
; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
60-
; RV64ID-NEXT: addi sp, sp, 16
61-
; RV64ID-NEXT: ret
62-
;
63-
; RV64IDINX-LABEL: sitofp_i128_to_f64:
64-
; RV64IDINX: # %bb.0:
65-
; RV64IDINX-NEXT: addi sp, sp, -16
66-
; RV64IDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
67-
; RV64IDINX-NEXT: call __floattidf
68-
; RV64IDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
69-
; RV64IDINX-NEXT: addi sp, sp, 16
70-
; RV64IDINX-NEXT: ret
36+
; CHECK-LABEL: sitofp_i128_to_f64:
37+
; CHECK: # %bb.0:
38+
; CHECK-NEXT: addi sp, sp, -16
39+
; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
40+
; CHECK-NEXT: call __floattidf
41+
; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
42+
; CHECK-NEXT: addi sp, sp, 16
43+
; CHECK-NEXT: ret
7144
%1 = call double @llvm.experimental.constrained.sitofp.f64.i128(i128 %a, metadata !"round.dynamic", metadata !"fpexcept.strict")
7245
ret double %1
7346
}
7447

7548
define double @uitofp_i128_to_f64(i128 %a) nounwind strictfp {
76-
; RV64ID-LABEL: uitofp_i128_to_f64:
77-
; RV64ID: # %bb.0:
78-
; RV64ID-NEXT: addi sp, sp, -16
79-
; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
80-
; RV64ID-NEXT: call __floatuntidf
81-
; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
82-
; RV64ID-NEXT: addi sp, sp, 16
83-
; RV64ID-NEXT: ret
84-
;
85-
; RV64IDINX-LABEL: uitofp_i128_to_f64:
86-
; RV64IDINX: # %bb.0:
87-
; RV64IDINX-NEXT: addi sp, sp, -16
88-
; RV64IDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
89-
; RV64IDINX-NEXT: call __floatuntidf
90-
; RV64IDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
91-
; RV64IDINX-NEXT: addi sp, sp, 16
92-
; RV64IDINX-NEXT: ret
49+
; CHECK-LABEL: uitofp_i128_to_f64:
50+
; CHECK: # %bb.0:
51+
; CHECK-NEXT: addi sp, sp, -16
52+
; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
53+
; CHECK-NEXT: call __floatuntidf
54+
; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
55+
; CHECK-NEXT: addi sp, sp, 16
56+
; CHECK-NEXT: ret
9357
%1 = call double @llvm.experimental.constrained.uitofp.f64.i128(i128 %a, metadata !"round.dynamic", metadata !"fpexcept.strict")
9458
ret double %1
9559
}
60+
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
61+
; RV64I: {{.*}}
62+
; RV64ID: {{.*}}
63+
; RV64IDINX: {{.*}}

‎llvm/test/CodeGen/RISCV/rv64-double-convert.ll‎

Lines changed: 35 additions & 107 deletions
Original file line numberDiff line numberDiff line change
@@ -1,131 +1,59 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
3-
; RUN: -target-abi=lp64 | FileCheck %s -check-prefix=RV64I
3+
; RUN: -target-abi=lp64 | FileCheck %s -check-prefixes=CHECK,RV64I
44
; RUN: llc -mtriple=riscv64 -mattr=+d -verify-machineinstrs < %s \
5-
; RUN: -target-abi=lp64d | FileCheck %s -check-prefix=RV64ID
5+
; RUN: -target-abi=lp64d | FileCheck %s -check-prefixes=CHECK,RV64ID
66
; RUN: llc -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs < %s \
7-
; RUN: -target-abi=lp64 | FileCheck %s -check-prefix=RV64IDINX
7+
; RUN: -target-abi=lp64 | FileCheck %s -check-prefixes=CHECK,RV64IDINX
88

99
define i128 @fptosi_f64_to_i128(double %a) nounwind {
10-
; RV64I-LABEL: fptosi_f64_to_i128:
11-
; RV64I: # %bb.0:
12-
; RV64I-NEXT: addi sp, sp, -16
13-
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
14-
; RV64I-NEXT: call __fixdfti
15-
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
16-
; RV64I-NEXT: addi sp, sp, 16
17-
; RV64I-NEXT: ret
18-
;
19-
; RV64ID-LABEL: fptosi_f64_to_i128:
20-
; RV64ID: # %bb.0:
21-
; RV64ID-NEXT: addi sp, sp, -16
22-
; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
23-
; RV64ID-NEXT: call __fixdfti
24-
; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
25-
; RV64ID-NEXT: addi sp, sp, 16
26-
; RV64ID-NEXT: ret
27-
;
28-
; RV64IDINX-LABEL: fptosi_f64_to_i128:
29-
; RV64IDINX: # %bb.0:
30-
; RV64IDINX-NEXT: addi sp, sp, -16
31-
; RV64IDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
32-
; RV64IDINX-NEXT: call __fixdfti
33-
; RV64IDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
34-
; RV64IDINX-NEXT: addi sp, sp, 16
35-
; RV64IDINX-NEXT: ret
10+
; CHECK-LABEL: fptosi_f64_to_i128:
11+
; CHECK: # %bb.0:
12+
; CHECK-NEXT: addi sp, sp, -16
13+
; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
14+
; CHECK-NEXT: call __fixdfti
15+
; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
16+
; CHECK-NEXT: addi sp, sp, 16
17+
; CHECK-NEXT: ret
3618
%1 = fptosi double %a to i128
3719
ret i128 %1
3820
}
3921

4022
define i128 @fptoui_f64_to_i128(double %a) nounwind {
41-
; RV64I-LABEL: fptoui_f64_to_i128:
42-
; RV64I: # %bb.0:
43-
; RV64I-NEXT: addi sp, sp, -16
44-
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
45-
; RV64I-NEXT: call __fixunsdfti
46-
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
47-
; RV64I-NEXT: addi sp, sp, 16
48-
; RV64I-NEXT: ret
49-
;
50-
; RV64ID-LABEL: fptoui_f64_to_i128:
51-
; RV64ID: # %bb.0:
52-
; RV64ID-NEXT: addi sp, sp, -16
53-
; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
54-
; RV64ID-NEXT: call __fixunsdfti
55-
; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
56-
; RV64ID-NEXT: addi sp, sp, 16
57-
; RV64ID-NEXT: ret
58-
;
59-
; RV64IDINX-LABEL: fptoui_f64_to_i128:
60-
; RV64IDINX: # %bb.0:
61-
; RV64IDINX-NEXT: addi sp, sp, -16
62-
; RV64IDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
63-
; RV64IDINX-NEXT: call __fixunsdfti
64-
; RV64IDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
65-
; RV64IDINX-NEXT: addi sp, sp, 16
66-
; RV64IDINX-NEXT: ret
23+
; CHECK-LABEL: fptoui_f64_to_i128:
24+
; CHECK: # %bb.0:
25+
; CHECK-NEXT: addi sp, sp, -16
26+
; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
27+
; CHECK-NEXT: call __fixunsdfti
28+
; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
29+
; CHECK-NEXT: addi sp, sp, 16
30+
; CHECK-NEXT: ret
6731
%1 = fptoui double %a to i128
6832
ret i128 %1
6933
}
7034

7135
define double @sitofp_i128_to_f64(i128 %a) nounwind {
72-
; RV64I-LABEL: sitofp_i128_to_f64:
73-
; RV64I: # %bb.0:
74-
; RV64I-NEXT: addi sp, sp, -16
75-
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
76-
; RV64I-NEXT: call __floattidf
77-
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
78-
; RV64I-NEXT: addi sp, sp, 16
79-
; RV64I-NEXT: ret
80-
;
81-
; RV64ID-LABEL: sitofp_i128_to_f64:
82-
; RV64ID: # %bb.0:
83-
; RV64ID-NEXT: addi sp, sp, -16
84-
; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
85-
; RV64ID-NEXT: call __floattidf
86-
; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
87-
; RV64ID-NEXT: addi sp, sp, 16
88-
; RV64ID-NEXT: ret
89-
;
90-
; RV64IDINX-LABEL: sitofp_i128_to_f64:
91-
; RV64IDINX: # %bb.0:
92-
; RV64IDINX-NEXT: addi sp, sp, -16
93-
; RV64IDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
94-
; RV64IDINX-NEXT: call __floattidf
95-
; RV64IDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
96-
; RV64IDINX-NEXT: addi sp, sp, 16
97-
; RV64IDINX-NEXT: ret
36+
; CHECK-LABEL: sitofp_i128_to_f64:
37+
; CHECK: # %bb.0:
38+
; CHECK-NEXT: addi sp, sp, -16
39+
; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
40+
; CHECK-NEXT: call __floattidf
41+
; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
42+
; CHECK-NEXT: addi sp, sp, 16
43+
; CHECK-NEXT: ret
9844
%1 = sitofp i128 %a to double
9945
ret double %1
10046
}
10147

10248
define double @uitofp_i128_to_f64(i128 %a) nounwind {
103-
; RV64I-LABEL: uitofp_i128_to_f64:
104-
; RV64I: # %bb.0:
105-
; RV64I-NEXT: addi sp, sp, -16
106-
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
107-
; RV64I-NEXT: call __floatuntidf
108-
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
109-
; RV64I-NEXT: addi sp, sp, 16
110-
; RV64I-NEXT: ret
111-
;
112-
; RV64ID-LABEL: uitofp_i128_to_f64:
113-
; RV64ID: # %bb.0:
114-
; RV64ID-NEXT: addi sp, sp, -16
115-
; RV64ID-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
116-
; RV64ID-NEXT: call __floatuntidf
117-
; RV64ID-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
118-
; RV64ID-NEXT: addi sp, sp, 16
119-
; RV64ID-NEXT: ret
120-
;
121-
; RV64IDINX-LABEL: uitofp_i128_to_f64:
122-
; RV64IDINX: # %bb.0:
123-
; RV64IDINX-NEXT: addi sp, sp, -16
124-
; RV64IDINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
125-
; RV64IDINX-NEXT: call __floatuntidf
126-
; RV64IDINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
127-
; RV64IDINX-NEXT: addi sp, sp, 16
128-
; RV64IDINX-NEXT: ret
49+
; CHECK-LABEL: uitofp_i128_to_f64:
50+
; CHECK: # %bb.0:
51+
; CHECK-NEXT: addi sp, sp, -16
52+
; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
53+
; CHECK-NEXT: call __floatuntidf
54+
; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
55+
; CHECK-NEXT: addi sp, sp, 16
56+
; CHECK-NEXT: ret
12957
%1 = uitofp i128 %a to double
13058
ret double %1
13159
}

‎llvm/test/CodeGen/RISCV/rv64-float-convert-strict.ll‎

Lines changed: 19 additions & 55 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,10 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc -mtriple=riscv64 -target-abi=lp64 -verify-machineinstrs < %s \
3-
; RUN: -disable-strictnode-mutation | FileCheck %s -check-prefix=RV64I
3+
; RUN: -disable-strictnode-mutation | FileCheck %s -check-prefixes=CHECK,RV64I
44
; RUN: llc -mtriple=riscv64 -mattr=+f -target-abi=lp64f -verify-machineinstrs < %s \
5-
; RUN: -disable-strictnode-mutation | FileCheck %s -check-prefix=RV64IF
5+
; RUN: -disable-strictnode-mutation | FileCheck %s -check-prefixes=CHECK,RV64IF
66
; RUN: llc -mtriple=riscv64 -mattr=+zfinx -target-abi=lp64 -verify-machineinstrs < %s \
7-
; RUN: -disable-strictnode-mutation | FileCheck %s -check-prefix=RV64IFINX
7+
; RUN: -disable-strictnode-mutation | FileCheck %s -check-prefixes=CHECK,RV64IFINX
88

99
define i128 @fptosi_f32_to_i128(float %a) nounwind strictfp {
1010
; RV64I-LABEL: fptosi_f32_to_i128:
@@ -71,63 +71,27 @@ define i128 @fptoui_f32_to_i128(float %a) nounwind strictfp {
7171
}
7272

7373
define float @sitofp_i128_to_f32(i128 %a) nounwind strictfp {
74-
; RV64I-LABEL: sitofp_i128_to_f32:
75-
; RV64I: # %bb.0:
76-
; RV64I-NEXT: addi sp, sp, -16
77-
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
78-
; RV64I-NEXT: call __floattisf
79-
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
80-
; RV64I-NEXT: addi sp, sp, 16
81-
; RV64I-NEXT: ret
82-
;
83-
; RV64IF-LABEL: sitofp_i128_to_f32:
84-
; RV64IF: # %bb.0:
85-
; RV64IF-NEXT: addi sp, sp, -16
86-
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
87-
; RV64IF-NEXT: call __floattisf
88-
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
89-
; RV64IF-NEXT: addi sp, sp, 16
90-
; RV64IF-NEXT: ret
91-
;
92-
; RV64IFINX-LABEL: sitofp_i128_to_f32:
93-
; RV64IFINX: # %bb.0:
94-
; RV64IFINX-NEXT: addi sp, sp, -16
95-
; RV64IFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
96-
; RV64IFINX-NEXT: call __floattisf
97-
; RV64IFINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
98-
; RV64IFINX-NEXT: addi sp, sp, 16
99-
; RV64IFINX-NEXT: ret
74+
; CHECK-LABEL: sitofp_i128_to_f32:
75+
; CHECK: # %bb.0:
76+
; CHECK-NEXT: addi sp, sp, -16
77+
; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
78+
; CHECK-NEXT: call __floattisf
79+
; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
80+
; CHECK-NEXT: addi sp, sp, 16
81+
; CHECK-NEXT: ret
10082
%1 = call float @llvm.experimental.constrained.sitofp.f32.i128(i128 %a, metadata !"round.dynamic", metadata !"fpexcept.strict")
10183
ret float %1
10284
}
10385

10486
define float @uitofp_i128_to_f32(i128 %a) nounwind strictfp {
105-
; RV64I-LABEL: uitofp_i128_to_f32:
106-
; RV64I: # %bb.0:
107-
; RV64I-NEXT: addi sp, sp, -16
108-
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
109-
; RV64I-NEXT: call __floatuntisf
110-
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
111-
; RV64I-NEXT: addi sp, sp, 16
112-
; RV64I-NEXT: ret
113-
;
114-
; RV64IF-LABEL: uitofp_i128_to_f32:
115-
; RV64IF: # %bb.0:
116-
; RV64IF-NEXT: addi sp, sp, -16
117-
; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
118-
; RV64IF-NEXT: call __floatuntisf
119-
; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
120-
; RV64IF-NEXT: addi sp, sp, 16
121-
; RV64IF-NEXT: ret
122-
;
123-
; RV64IFINX-LABEL: uitofp_i128_to_f32:
124-
; RV64IFINX: # %bb.0:
125-
; RV64IFINX-NEXT: addi sp, sp, -16
126-
; RV64IFINX-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
127-
; RV64IFINX-NEXT: call __floatuntisf
128-
; RV64IFINX-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
129-
; RV64IFINX-NEXT: addi sp, sp, 16
130-
; RV64IFINX-NEXT: ret
87+
; CHECK-LABEL: uitofp_i128_to_f32:
88+
; CHECK: # %bb.0:
89+
; CHECK-NEXT: addi sp, sp, -16
90+
; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
91+
; CHECK-NEXT: call __floatuntisf
92+
; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 16
94+
; CHECK-NEXT: ret
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%1 = call float @llvm.experimental.constrained.uitofp.f32.i128(i128 %a, metadata !"round.dynamic", metadata !"fpexcept.strict")
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ret float %1
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}

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