AS

optimisan · optimisan · commit 32a33ebfdade · 2024-10-09T06:05:22.000Z
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -1717,18 +1717,16 @@ bool GCNTargetMachine::parseMachineFunctionInfo(
   }
 
   auto setRegisterFlags = [&](const VRegInfo &Info) {
-    for (const auto &Flag : Info.Flags) {
+    for (uint8_t Flag : Info.Flags) {
       MFI->setFlag(Info.VReg, Flag);
     }
   };
 
-  for (const auto &P : PFS.VRegInfosNamed) {
-    const VRegInfo &Info = *P.second;
-    setRegisterFlags(Info);
+  for (const auto &[_, Info] : PFS.VRegInfosNamed) {
+    setRegisterFlags(*Info);
   }
-  for (const auto &P : PFS.VRegInfos) {
-    const VRegInfo &Info = *P.second;
-    setRegisterFlags(Info);
+  for (const auto &[_, Info] : PFS.VRegInfos) {
+    setRegisterFlags(*Info);
   }
 
   auto parseAndCheckArgument = [&](const std::optional<yaml::SIArgument> &A,

Original file line number	Diff line number	Diff line change
`@@ -1717,18 +1717,16 @@ bool GCNTargetMachine::parseMachineFunctionInfo(`
`1717`	`1717`	`}`
`1718`	`1718`
`1719`	`1719`	`auto setRegisterFlags = [&](const VRegInfo &Info) {`
`1720`		`- for (const auto &Flag : Info.Flags) {`
	`1720`	`+ for (uint8_t Flag : Info.Flags) {`
`1721`	`1721`	`MFI->setFlag(Info.VReg, Flag);`
`1722`	`1722`	`}`
`1723`	`1723`	`};`
`1724`	`1724`
`1725`		`- for (const auto &P : PFS.VRegInfosNamed) {`
`1726`		`- const VRegInfo &Info = *P.second;`
`1727`		`- setRegisterFlags(Info);`
	`1725`	`+ for (const auto &[_, Info] : PFS.VRegInfosNamed) {`
	`1726`	`+ setRegisterFlags(*Info);`
`1728`	`1727`	`}`
`1729`		`- for (const auto &P : PFS.VRegInfos) {`
`1730`		`- const VRegInfo &Info = *P.second;`
`1731`		`- setRegisterFlags(Info);`
	`1728`	`+ for (const auto &[_, Info] : PFS.VRegInfos) {`
	`1729`	`+ setRegisterFlags(*Info);`
`1732`	`1730`	`}`
`1733`	`1731`
`1734`	`1732`	`auto parseAndCheckArgument = [&](const std::optional<yaml::SIArgument> &A,`