@@ -44,6 +44,13 @@ using namespace llvm;
4444#define GET_REGINFO_MC_DESC
4545#include " MipsGenRegisterInfo.inc"
4646
47+ namespace {
48+ class MipsWinCOFFTargetStreamer : public MipsTargetStreamer {
49+ public:
50+ MipsWinCOFFTargetStreamer (MCStreamer &S) : MipsTargetStreamer(S) {}
51+ };
52+ } // end namespace
53+
4754// / Select the Mips CPU for the given triple and cpu name.
4855StringRef MIPS_MC::selectMipsCPU (const Triple &TT, StringRef CPU) {
4956 if (CPU.empty () || CPU == " generic" ) {
@@ -83,7 +90,12 @@ static MCSubtargetInfo *createMipsMCSubtargetInfo(const Triple &TT,
8390static MCAsmInfo *createMipsMCAsmInfo (const MCRegisterInfo &MRI,
8491 const Triple &TT,
8592 const MCTargetOptions &Options) {
86- MCAsmInfo *MAI = new MipsELFMCAsmInfo (TT, Options);
93+ MCAsmInfo *MAI;
94+
95+ if (TT.isOSWindows ())
96+ MAI = new MipsCOFFMCAsmInfo ();
97+ else
98+ MAI = new MipsELFMCAsmInfo (TT, Options);
8799
88100 unsigned SP = MRI.getDwarfRegNum (Mips::SP, true );
89101 MCCFIInstruction Inst = MCCFIInstruction::createDefCfaRegister (nullptr , SP);
@@ -126,6 +138,8 @@ static MCTargetStreamer *createMipsNullTargetStreamer(MCStreamer &S) {
126138
127139static MCTargetStreamer *
128140createMipsObjectTargetStreamer (MCStreamer &S, const MCSubtargetInfo &STI) {
141+ if (STI.getTargetTriple ().isOSBinFormatCOFF ())
142+ return new MipsWinCOFFTargetStreamer (S);
129143 return new MipsTargetELFStreamer (S, STI);
130144}
131145
@@ -185,6 +199,8 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTargetMC() {
185199 TargetRegistry::RegisterNullTargetStreamer (*T,
186200 createMipsNullTargetStreamer);
187201
202+ TargetRegistry::RegisterCOFFStreamer (*T, createMipsWinCOFFStreamer);
203+
188204 // Register the MC subtarget info.
189205 TargetRegistry::RegisterMCSubtargetInfo (*T, createMipsMCSubtargetInfo);
190206
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