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[VE] Use MCRegister instead of unsigned. NFC
1 parent 00d2780 commit 33b4f71

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+29
-29
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1 file changed

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-29
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‎llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp‎

Lines changed: 29 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -54,7 +54,7 @@ class VEAsmParser : public MCTargetAsmParser {
5454
uint64_t &ErrorInfo,
5555
bool MatchingInlineAsm) override;
5656
bool parseRegister(MCRegister &Reg, SMLoc &StartLoc, SMLoc &EndLoc) override;
57-
int parseRegisterName(MCRegister (*matchFn)(StringRef));
57+
MCRegister parseRegisterName(MCRegister (*matchFn)(StringRef));
5858
ParseStatus tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
5959
SMLoc &EndLoc) override;
6060
bool parseInstruction(ParseInstructionInfo &Info, StringRef Name,
@@ -169,15 +169,15 @@ class VEOperand : public MCParsedAsmOperand {
169169
};
170170

171171
struct RegOp {
172-
unsigned RegNum;
172+
MCRegister RegNum;
173173
};
174174

175175
struct ImmOp {
176176
const MCExpr *Val;
177177
};
178178

179179
struct MemOp {
180-
unsigned Base;
180+
MCRegister Base;
181181
unsigned IndexReg;
182182
const MCExpr *Index;
183183
const MCExpr *Offset;
@@ -350,14 +350,14 @@ class VEOperand : public MCParsedAsmOperand {
350350
return Imm.Val;
351351
}
352352

353-
unsigned getMemBase() const {
353+
MCRegister getMemBase() const {
354354
assert((Kind == k_MemoryRegRegImm || Kind == k_MemoryRegImmImm ||
355355
Kind == k_MemoryRegImm) &&
356356
"Invalid access!");
357357
return Mem.Base;
358358
}
359359

360-
unsigned getMemIndexReg() const {
360+
MCRegister getMemIndexReg() const {
361361
assert((Kind == k_MemoryRegRegImm || Kind == k_MemoryZeroRegImm) &&
362362
"Invalid access!");
363363
return Mem.IndexReg;
@@ -415,28 +415,28 @@ class VEOperand : public MCParsedAsmOperand {
415415
OS << "Token: " << getToken() << "\n";
416416
break;
417417
case k_Register:
418-
OS << "Reg: #" << getReg() << "\n";
418+
OS << "Reg: #" << getReg().id() << "\n";
419419
break;
420420
case k_Immediate:
421421
OS << "Imm: " << getImm() << "\n";
422422
break;
423423
case k_MemoryRegRegImm:
424424
assert(getMemOffset() != nullptr);
425-
OS << "Mem: #" << getMemBase() << "+#" << getMemIndexReg() << "+";
425+
OS << "Mem: #" << getMemBase().id() << "+#" << getMemIndexReg().id() << "+";
426426
MAI.printExpr(OS, *getMemOffset());
427427
OS << "\n";
428428
break;
429429
case k_MemoryRegImmImm:
430430
assert(getMemIndex() != nullptr && getMemOffset() != nullptr);
431-
OS << "Mem: #" << getMemBase() << "+";
431+
OS << "Mem: #" << getMemBase().id() << "+";
432432
MAI.printExpr(OS, *getMemIndex());
433433
OS << "+";
434434
MAI.printExpr(OS, *getMemOffset());
435435
OS << "\n";
436436
break;
437437
case k_MemoryZeroRegImm:
438438
assert(getMemOffset() != nullptr);
439-
OS << "Mem: 0+#" << getMemIndexReg() << "+";
439+
OS << "Mem: 0+#" << getMemIndexReg().id() << "+";
440440
MAI.printExpr(OS, *getMemOffset());
441441
OS << "\n";
442442
break;
@@ -450,7 +450,7 @@ class VEOperand : public MCParsedAsmOperand {
450450
break;
451451
case k_MemoryRegImm:
452452
assert(getMemOffset() != nullptr);
453-
OS << "Mem: #" << getMemBase() << "+";
453+
OS << "Mem: #" << getMemBase().id() << "+";
454454
MAI.printExpr(OS, *getMemOffset());
455455
OS << "\n";
456456
break;
@@ -606,7 +606,7 @@ class VEOperand : public MCParsedAsmOperand {
606606
return Op;
607607
}
608608

609-
static std::unique_ptr<VEOperand> CreateReg(unsigned RegNum, SMLoc S,
609+
static std::unique_ptr<VEOperand> CreateReg(MCRegister RegNum, SMLoc S,
610610
SMLoc E) {
611611
auto Op = std::make_unique<VEOperand>(k_Register);
612612
Op->Reg.RegNum = RegNum;
@@ -653,7 +653,7 @@ class VEOperand : public MCParsedAsmOperand {
653653
}
654654

655655
static bool MorphToI32Reg(VEOperand &Op) {
656-
unsigned Reg = Op.getReg();
656+
MCRegister Reg = Op.getReg();
657657
unsigned regIdx = Reg - VE::SX0;
658658
if (regIdx > 63)
659659
return false;
@@ -662,7 +662,7 @@ class VEOperand : public MCParsedAsmOperand {
662662
}
663663

664664
static bool MorphToF32Reg(VEOperand &Op) {
665-
unsigned Reg = Op.getReg();
665+
MCRegister Reg = Op.getReg();
666666
unsigned regIdx = Reg - VE::SX0;
667667
if (regIdx > 63)
668668
return false;
@@ -671,7 +671,7 @@ class VEOperand : public MCParsedAsmOperand {
671671
}
672672

673673
static bool MorphToF128Reg(VEOperand &Op) {
674-
unsigned Reg = Op.getReg();
674+
MCRegister Reg = Op.getReg();
675675
unsigned regIdx = Reg - VE::SX0;
676676
if (regIdx % 2 || regIdx > 63)
677677
return false;
@@ -680,7 +680,7 @@ class VEOperand : public MCParsedAsmOperand {
680680
}
681681

682682
static bool MorphToVM512Reg(VEOperand &Op) {
683-
unsigned Reg = Op.getReg();
683+
MCRegister Reg = Op.getReg();
684684
unsigned regIdx = Reg - VE::VM0;
685685
if (regIdx % 2 || regIdx > 15)
686686
return false;
@@ -701,11 +701,11 @@ class VEOperand : public MCParsedAsmOperand {
701701
}
702702

703703
static std::unique_ptr<VEOperand>
704-
MorphToMEMri(unsigned Base, std::unique_ptr<VEOperand> Op) {
704+
MorphToMEMri(MCRegister Base, std::unique_ptr<VEOperand> Op) {
705705
const MCExpr *Imm = Op->getImm();
706706
Op->Kind = k_MemoryRegImm;
707707
Op->Mem.Base = Base;
708-
Op->Mem.IndexReg = 0;
708+
Op->Mem.IndexReg = MCRegister();
709709
Op->Mem.Index = nullptr;
710710
Op->Mem.Offset = Imm;
711711
return Op;
@@ -715,15 +715,15 @@ class VEOperand : public MCParsedAsmOperand {
715715
MorphToMEMzi(std::unique_ptr<VEOperand> Op) {
716716
const MCExpr *Imm = Op->getImm();
717717
Op->Kind = k_MemoryZeroImm;
718-
Op->Mem.Base = 0;
719-
Op->Mem.IndexReg = 0;
718+
Op->Mem.Base = MCRegister();
719+
Op->Mem.IndexReg = MCRegister();
720720
Op->Mem.Index = nullptr;
721721
Op->Mem.Offset = Imm;
722722
return Op;
723723
}
724724

725725
static std::unique_ptr<VEOperand>
726-
MorphToMEMrri(unsigned Base, unsigned Index, std::unique_ptr<VEOperand> Op) {
726+
MorphToMEMrri(MCRegister Base, MCRegister Index, std::unique_ptr<VEOperand> Op) {
727727
const MCExpr *Imm = Op->getImm();
728728
Op->Kind = k_MemoryRegRegImm;
729729
Op->Mem.Base = Base;
@@ -734,22 +734,22 @@ class VEOperand : public MCParsedAsmOperand {
734734
}
735735

736736
static std::unique_ptr<VEOperand>
737-
MorphToMEMrii(unsigned Base, const MCExpr *Index,
737+
MorphToMEMrii(MCRegister Base, const MCExpr *Index,
738738
std::unique_ptr<VEOperand> Op) {
739739
const MCExpr *Imm = Op->getImm();
740740
Op->Kind = k_MemoryRegImmImm;
741741
Op->Mem.Base = Base;
742-
Op->Mem.IndexReg = 0;
742+
Op->Mem.IndexReg = MCRegister();
743743
Op->Mem.Index = Index;
744744
Op->Mem.Offset = Imm;
745745
return Op;
746746
}
747747

748748
static std::unique_ptr<VEOperand>
749-
MorphToMEMzri(unsigned Index, std::unique_ptr<VEOperand> Op) {
749+
MorphToMEMzri(MCRegister Index, std::unique_ptr<VEOperand> Op) {
750750
const MCExpr *Imm = Op->getImm();
751751
Op->Kind = k_MemoryZeroRegImm;
752-
Op->Mem.Base = 0;
752+
Op->Mem.Base = MCRegister();
753753
Op->Mem.IndexReg = Index;
754754
Op->Mem.Index = nullptr;
755755
Op->Mem.Offset = Imm;
@@ -760,8 +760,8 @@ class VEOperand : public MCParsedAsmOperand {
760760
MorphToMEMzii(const MCExpr *Index, std::unique_ptr<VEOperand> Op) {
761761
const MCExpr *Imm = Op->getImm();
762762
Op->Kind = k_MemoryZeroImmImm;
763-
Op->Mem.Base = 0;
764-
Op->Mem.IndexReg = 0;
763+
Op->Mem.Base = MCRegister();
764+
Op->Mem.IndexReg = MCRegister();
765765
Op->Mem.Index = Index;
766766
Op->Mem.Offset = Imm;
767767
return Op;
@@ -815,14 +815,14 @@ bool VEAsmParser::parseRegister(MCRegister &Reg, SMLoc &StartLoc,
815815

816816
/// Parses a register name using a given matching function.
817817
/// Checks for lowercase or uppercase if necessary.
818-
int VEAsmParser::parseRegisterName(MCRegister (*matchFn)(StringRef)) {
818+
MCRegister VEAsmParser::parseRegisterName(MCRegister (*matchFn)(StringRef)) {
819819
StringRef Name = Parser.getTok().getString();
820820

821-
int RegNum = matchFn(Name);
821+
MCRegister RegNum = matchFn(Name);
822822

823823
// GCC supports case insensitive register names. All of the VE registers
824824
// are all lower case.
825-
if (RegNum == VE::NoRegister) {
825+
if (!RegNum) {
826826
RegNum = matchFn(Name.lower());
827827
}
828828

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