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[AArch64] Regnerate and update a number of tests. NFC
extend_inreg_of_concat_subvectors.ll was using -mattr=+global-isel, which is now replaced by -global-isel
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5 files changed

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llvm/test/CodeGen/AArch64/arm64-ext.ll

Lines changed: 65 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -135,3 +135,68 @@ define <2 x ptr> @test_v2p0(<2 x ptr> %a, <2 x ptr> %b) {
135135
%s = shufflevector <2 x ptr> %a, <2 x ptr> %b, <2 x i32> <i32 3, i32 0>
136136
ret <2 x ptr> %s
137137
}
138+
139+
define <16 x i8> @reverse_vector_s8x16b(<16 x i8> noundef %x) {
140+
; CHECK-SD-LABEL: reverse_vector_s8x16b:
141+
; CHECK-SD: // %bb.0: // %entry
142+
; CHECK-SD-NEXT: rev64 v1.16b, v0.16b
143+
; CHECK-SD-NEXT: ext v0.16b, v1.16b, v1.16b, #8
144+
; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
145+
; CHECK-SD-NEXT: ret
146+
;
147+
; CHECK-GI-LABEL: reverse_vector_s8x16b:
148+
; CHECK-GI: // %bb.0: // %entry
149+
; CHECK-GI-NEXT: rev64 v1.16b, v0.16b
150+
; CHECK-GI-NEXT: mov d0, v1.d[1]
151+
; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
152+
; CHECK-GI-NEXT: ret
153+
entry:
154+
%shuffle.i = shufflevector <16 x i8> %x, <16 x i8> poison, <16 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8>
155+
%shuffle.i6 = shufflevector <16 x i8> %shuffle.i, <16 x i8> poison, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
156+
%shuffle.i7 = shufflevector <16 x i8> %shuffle.i, <16 x i8> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
157+
%shuffle.i5 = shufflevector <8 x i8> %shuffle.i6, <8 x i8> %shuffle.i7, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
158+
ret <16 x i8> %shuffle.i5
159+
}
160+
161+
define <8 x i16> @reverse_vector_s16x8b(<8 x i16> noundef %x) {
162+
; CHECK-SD-LABEL: reverse_vector_s16x8b:
163+
; CHECK-SD: // %bb.0: // %entry
164+
; CHECK-SD-NEXT: rev64 v1.8h, v0.8h
165+
; CHECK-SD-NEXT: ext v0.16b, v1.16b, v1.16b, #8
166+
; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
167+
; CHECK-SD-NEXT: ret
168+
;
169+
; CHECK-GI-LABEL: reverse_vector_s16x8b:
170+
; CHECK-GI: // %bb.0: // %entry
171+
; CHECK-GI-NEXT: rev64 v1.8h, v0.8h
172+
; CHECK-GI-NEXT: mov d0, v1.d[1]
173+
; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
174+
; CHECK-GI-NEXT: ret
175+
entry:
176+
%shuffle.i = shufflevector <8 x i16> %x, <8 x i16> poison, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>
177+
%shuffle.i6 = shufflevector <8 x i16> %shuffle.i, <8 x i16> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
178+
%shuffle.i7 = shufflevector <8 x i16> %shuffle.i, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
179+
%shuffle.i5 = shufflevector <4 x i16> %shuffle.i6, <4 x i16> %shuffle.i7, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
180+
ret <8 x i16> %shuffle.i5
181+
}
182+
183+
define <4 x i32> @reverse_vector_s32x4b(<4 x i32> noundef %x) {
184+
; CHECK-SD-LABEL: reverse_vector_s32x4b:
185+
; CHECK-SD: // %bb.0: // %entry
186+
; CHECK-SD-NEXT: rev64 v0.4s, v0.4s
187+
; CHECK-SD-NEXT: ext v0.16b, v0.16b, v0.16b, #8
188+
; CHECK-SD-NEXT: ret
189+
;
190+
; CHECK-GI-LABEL: reverse_vector_s32x4b:
191+
; CHECK-GI: // %bb.0: // %entry
192+
; CHECK-GI-NEXT: rev64 v1.4s, v0.4s
193+
; CHECK-GI-NEXT: mov d0, v1.d[1]
194+
; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
195+
; CHECK-GI-NEXT: ret
196+
entry:
197+
%shuffle.i = shufflevector <4 x i32> %x, <4 x i32> poison, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
198+
%shuffle.i6 = shufflevector <4 x i32> %shuffle.i, <4 x i32> poison, <2 x i32> <i32 2, i32 3>
199+
%shuffle.i7 = shufflevector <4 x i32> %shuffle.i, <4 x i32> poison, <2 x i32> <i32 0, i32 1>
200+
%shuffle.i5 = shufflevector <2 x i32> %shuffle.i6, <2 x i32> %shuffle.i7, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
201+
ret <4 x i32> %shuffle.i5
202+
}

llvm/test/CodeGen/AArch64/arm64-neon-copy.ll

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1708,7 +1708,7 @@ define <16 x i8> @test_concat_v16i8_v8i8_v16i8(<8 x i8> %x, <16 x i8> %y) #0 {
17081708
; CHECK-GI-LABEL: test_concat_v16i8_v8i8_v16i8:
17091709
; CHECK-GI: // %bb.0: // %entry
17101710
; CHECK-GI-NEXT: mov v2.16b, v1.16b
1711-
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
1711+
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 def $q0 def $q0 def $q0 def $q0 def $q0 def $q0 def $q0
17121712
; CHECK-GI-NEXT: adrp x8, .LCPI127_0
17131713
; CHECK-GI-NEXT: mov v1.b[0], v0.b[0]
17141714
; CHECK-GI-NEXT: mov v1.b[1], v0.b[1]
@@ -1752,7 +1752,7 @@ define <16 x i8> @test_concat_v16i8_v16i8_v8i8(<16 x i8> %x, <8 x i8> %y) #0 {
17521752
; CHECK-GI-LABEL: test_concat_v16i8_v16i8_v8i8:
17531753
; CHECK-GI: // %bb.0: // %entry
17541754
; CHECK-GI-NEXT: mov b2, v0.b[0]
1755-
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
1755+
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 def $q1 def $q1 def $q1 def $q1 def $q1 def $q1 def $q1
17561756
; CHECK-GI-NEXT: mov v2.b[1], v0.b[1]
17571757
; CHECK-GI-NEXT: mov v2.b[2], v0.b[2]
17581758
; CHECK-GI-NEXT: mov v2.b[3], v0.b[3]
@@ -1816,9 +1816,9 @@ define <16 x i8> @test_concat_v16i8_v8i8_v8i8(<8 x i8> %x, <8 x i8> %y) #0 {
18161816
;
18171817
; CHECK-GI-LABEL: test_concat_v16i8_v8i8_v8i8:
18181818
; CHECK-GI: // %bb.0: // %entry
1819-
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
1819+
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 def $q0 def $q0 def $q0 def $q0 def $q0 def $q0 def $q0
18201820
; CHECK-GI-NEXT: mov v2.b[0], v0.b[0]
1821-
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
1821+
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 def $q1 def $q1 def $q1 def $q1 def $q1 def $q1 def $q1
18221822
; CHECK-GI-NEXT: mov v2.b[1], v0.b[1]
18231823
; CHECK-GI-NEXT: mov v2.b[2], v0.b[2]
18241824
; CHECK-GI-NEXT: mov v2.b[3], v0.b[3]
@@ -1901,7 +1901,7 @@ define <8 x i16> @test_concat_v8i16_v4i16_v8i16(<4 x i16> %x, <8 x i16> %y) #0 {
19011901
; CHECK-GI-LABEL: test_concat_v8i16_v4i16_v8i16:
19021902
; CHECK-GI: // %bb.0: // %entry
19031903
; CHECK-GI-NEXT: mov v2.16b, v1.16b
1904-
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
1904+
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 def $q0 def $q0 def $q0
19051905
; CHECK-GI-NEXT: adrp x8, .LCPI131_0
19061906
; CHECK-GI-NEXT: mov v1.h[0], v0.h[0]
19071907
; CHECK-GI-NEXT: mov v1.h[1], v0.h[1]
@@ -1933,7 +1933,7 @@ define <8 x i16> @test_concat_v8i16_v8i16_v4i16(<8 x i16> %x, <4 x i16> %y) #0 {
19331933
; CHECK-GI-LABEL: test_concat_v8i16_v8i16_v4i16:
19341934
; CHECK-GI: // %bb.0: // %entry
19351935
; CHECK-GI-NEXT: mov h2, v0.h[0]
1936-
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
1936+
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 def $q1 def $q1 def $q1
19371937
; CHECK-GI-NEXT: mov v2.h[1], v0.h[1]
19381938
; CHECK-GI-NEXT: mov v2.h[2], v0.h[2]
19391939
; CHECK-GI-NEXT: mov v2.h[3], v0.h[3]
@@ -1973,9 +1973,9 @@ define <8 x i16> @test_concat_v8i16_v4i16_v4i16(<4 x i16> %x, <4 x i16> %y) #0 {
19731973
;
19741974
; CHECK-GI-LABEL: test_concat_v8i16_v4i16_v4i16:
19751975
; CHECK-GI: // %bb.0: // %entry
1976-
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
1976+
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 def $q0 def $q0 def $q0
19771977
; CHECK-GI-NEXT: mov v2.h[0], v0.h[0]
1978-
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
1978+
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 def $q1 def $q1 def $q1
19791979
; CHECK-GI-NEXT: mov v2.h[1], v0.h[1]
19801980
; CHECK-GI-NEXT: mov v2.h[2], v0.h[2]
19811981
; CHECK-GI-NEXT: mov v2.h[3], v0.h[3]
@@ -2034,7 +2034,7 @@ define <4 x i32> @test_concat_v4i32_v2i32_v4i32(<2 x i32> %x, <4 x i32> %y) #0 {
20342034
; CHECK-GI-LABEL: test_concat_v4i32_v2i32_v4i32:
20352035
; CHECK-GI: // %bb.0: // %entry
20362036
; CHECK-GI-NEXT: mov v2.16b, v1.16b
2037-
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
2037+
; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 def $q0
20382038
; CHECK-GI-NEXT: adrp x8, .LCPI135_0
20392039
; CHECK-GI-NEXT: mov v1.s[0], v0.s[0]
20402040
; CHECK-GI-NEXT: mov v1.s[1], v0.s[1]
@@ -2060,7 +2060,7 @@ define <4 x i32> @test_concat_v4i32_v4i32_v2i32(<4 x i32> %x, <2 x i32> %y) #0 {
20602060
; CHECK-GI-LABEL: test_concat_v4i32_v4i32_v2i32:
20612061
; CHECK-GI: // %bb.0: // %entry
20622062
; CHECK-GI-NEXT: mov s2, v0.s[0]
2063-
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
2063+
; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 def $q1
20642064
; CHECK-GI-NEXT: mov v2.s[1], v0.s[1]
20652065
; CHECK-GI-NEXT: mov v2.s[2], v1.s[0]
20662066
; CHECK-GI-NEXT: mov v2.s[3], v1.s[1]

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