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Using new naming convention for intrinsics
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9 files changed

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-63
lines changed

9 files changed

+63
-63
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‎clang/lib/CodeGen/CGBuiltin.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -19191,11 +19191,11 @@ static Intrinsic::ID getWaveActiveSumIntrinsic(llvm::Triple::ArchType Arch,
1919119191
CGHLSLRuntime &RT, QualType QT) {
1919219192
switch (Arch) {
1919319193
case llvm::Triple::spirv:
19194-
return llvm::Intrinsic::spv_wave_active_sum;
19194+
return llvm::Intrinsic::spv_wave_reduce_sum;
1919519195
case llvm::Triple::dxil: {
1919619196
if (QT->isUnsignedIntegerType())
19197-
return llvm::Intrinsic::dx_wave_active_usum;
19198-
return llvm::Intrinsic::dx_wave_active_sum;
19197+
return llvm::Intrinsic::dx_wave_reduce_usum;
19198+
return llvm::Intrinsic::dx_wave_reduce_sum;
1919919199
}
1920019200
default:
1920119201
llvm_unreachable("Intrinsic WaveActiveSum"

‎clang/test/CodeGenHLSL/builtins/WaveActiveSum.hlsl‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -9,37 +9,37 @@
99

1010
// CHECK-LABEL: test_int
1111
int test_int(int expr) {
12-
// CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.active.sum.i32([[TY]] %[[#]])
13-
// CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.active.sum.i32([[TY]] %[[#]])
12+
// CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.reduce.sum.i32([[TY]] %[[#]])
13+
// CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.reduce.sum.i32([[TY]] %[[#]])
1414
// CHECK: ret [[TY]] %[[RET]]
1515
return WaveActiveSum(expr);
1616
}
1717

18-
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.active.sum.i32([[TY]]) #[[#attr:]]
19-
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.active.sum.i32([[TY]]) #[[#attr:]]
18+
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.reduce.sum.i32([[TY]]) #[[#attr:]]
19+
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.reduce.sum.i32([[TY]]) #[[#attr:]]
2020

2121
// CHECK-LABEL: test_uint64_t
2222
uint64_t test_uint64_t(uint64_t expr) {
23-
// CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.active.sum.i64([[TY]] %[[#]])
24-
// CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.active.usum.i64([[TY]] %[[#]])
23+
// CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.reduce.sum.i64([[TY]] %[[#]])
24+
// CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.reduce.usum.i64([[TY]] %[[#]])
2525
// CHECK: ret [[TY]] %[[RET]]
2626
return WaveActiveSum(expr);
2727
}
2828

29-
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.active.usum.i64([[TY]]) #[[#attr:]]
30-
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.active.sum.i64([[TY]]) #[[#attr:]]
29+
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.reduce.usum.i64([[TY]]) #[[#attr:]]
30+
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.reduce.sum.i64([[TY]]) #[[#attr:]]
3131

3232
// Test basic lowering to runtime function call with array and float value.
3333

3434
// CHECK-LABEL: test_floatv4
3535
float4 test_floatv4(float4 expr) {
36-
// CHECK-SPIRV: %[[RET1:.*]] = call spir_func [[TY1:.*]] @llvm.spv.wave.active.sum.v4f32([[TY1]] %[[#]]
37-
// CHECK-DXIL: %[[RET1:.*]] = call [[TY1:.*]] @llvm.dx.wave.active.sum.v4f32([[TY1]] %[[#]])
36+
// CHECK-SPIRV: %[[RET1:.*]] = call spir_func [[TY1:.*]] @llvm.spv.wave.reduce.sum.v4f32([[TY1]] %[[#]]
37+
// CHECK-DXIL: %[[RET1:.*]] = call [[TY1:.*]] @llvm.dx.wave.reduce.sum.v4f32([[TY1]] %[[#]])
3838
// CHECK: ret [[TY1]] %[[RET1]]
3939
return WaveActiveSum(expr);
4040
}
4141

42-
// CHECK-DXIL: declare [[TY1]] @llvm.dx.wave.active.sum.v4f32([[TY1]]) #[[#attr]]
43-
// CHECK-SPIRV: declare spir_func [[TY1]] @llvm.spv.wave.active.sum.v4f32([[TY1]]) #[[#attr]]
42+
// CHECK-DXIL: declare [[TY1]] @llvm.dx.wave.reduce.sum.v4f32([[TY1]]) #[[#attr]]
43+
// CHECK-SPIRV: declare spir_func [[TY1]] @llvm.spv.wave.reduce.sum.v4f32([[TY1]]) #[[#attr]]
4444

4545
// CHECK: attributes #[[#attr]] = {{{.*}} convergent {{.*}}}

‎llvm/include/llvm/IR/IntrinsicsDirectX.td‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -102,8 +102,8 @@ def int_dx_wave_active_countbits : DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i1
102102
def int_dx_wave_all : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_i1_ty], [IntrConvergent, IntrNoMem]>;
103103
def int_dx_wave_any : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_i1_ty], [IntrConvergent, IntrNoMem]>;
104104
def int_dx_wave_getlaneindex : DefaultAttrsIntrinsic<[llvm_i32_ty], [], [IntrConvergent, IntrNoMem]>;
105-
def int_dx_wave_active_sum : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
106-
def int_dx_wave_active_usum : DefaultAttrsIntrinsic<[llvm_anyint_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
105+
def int_dx_wave_reduce_sum : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
106+
def int_dx_wave_reduce_usum : DefaultAttrsIntrinsic<[llvm_anyint_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
107107
def int_dx_wave_is_first_lane : DefaultAttrsIntrinsic<[llvm_i1_ty], [], [IntrConvergent]>;
108108
def int_dx_wave_readlane : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>, llvm_i32_ty], [IntrConvergent, IntrNoMem]>;
109109
def int_dx_sign : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_any_ty], [IntrNoMem]>;

‎llvm/include/llvm/IR/IntrinsicsSPIRV.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -91,7 +91,7 @@ let TargetPrefix = "spv" in {
9191
def int_spv_wave_active_countbits : DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i1_ty], [IntrConvergent, IntrNoMem]>;
9292
def int_spv_wave_all : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_i1_ty], [IntrConvergent, IntrNoMem]>;
9393
def int_spv_wave_any : DefaultAttrsIntrinsic<[llvm_i1_ty], [llvm_i1_ty], [IntrConvergent, IntrNoMem]>;
94-
def int_spv_wave_active_sum : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
94+
def int_spv_wave_reduce_sum : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrConvergent, IntrNoMem]>;
9595
def int_spv_wave_is_first_lane : DefaultAttrsIntrinsic<[llvm_i1_ty], [], [IntrConvergent]>;
9696
def int_spv_wave_readlane : DefaultAttrsIntrinsic<[llvm_any_ty], [LLVMMatchType<0>, llvm_i32_ty], [IntrConvergent, IntrNoMem]>;
9797
def int_spv_sign : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_any_ty], [IntrNoMem]>;

‎llvm/lib/Target/DirectX/DXIL.td‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -348,7 +348,7 @@ class IntrinArgI32 <int value> : IntrinArgSelect<IntrinArgSelect_I32, value>;
348348
// IntrinSelect<int_dx_wave_active_usum,
349349
// [ IntrinArgIndex<0>, IntrinArgI8<0>, IntrinArgI8<1> ]
350350
// >,
351-
// IntrinSelect<int_dx_wave_active_sum,
351+
// IntrinSelect<int_dx_wave_reduce_sum,
352352
// [ IntrinArgIndex<0>, IntrinArgI8<0>, IntrinArgI8<0> ]
353353
// >,
354354
// ]
@@ -971,10 +971,10 @@ def WaveActiveOp : DXILOp<119, waveActiveOp> {
971971
let Doc = "returns the result of the operation across waves";
972972
let intrinsics = [
973973
IntrinSelect<
974-
int_dx_wave_active_sum,
974+
int_dx_wave_reduce_sum,
975975
[ IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Sum>, IntrinArgI8<SignedOpKind_Signed> ]>,
976976
IntrinSelect<
977-
int_dx_wave_active_usum,
977+
int_dx_wave_reduce_usum,
978978
[ IntrinArgIndex<0>, IntrinArgI8<WaveOpKind_Sum>, IntrinArgI8<SignedOpKind_Unsigned> ]>,
979979
];
980980

‎llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -40,8 +40,8 @@ bool DirectXTTIImpl::isTargetIntrinsicTriviallyScalarizable(
4040
switch (ID) {
4141
case Intrinsic::dx_frac:
4242
case Intrinsic::dx_rsqrt:
43-
case Intrinsic::dx_wave_active_sum:
44-
case Intrinsic::dx_wave_active_usum:
43+
case Intrinsic::dx_wave_reduce_sum:
44+
case Intrinsic::dx_wave_reduce_usum:
4545
case Intrinsic::dx_wave_readlane:
4646
case Intrinsic::dx_asdouble:
4747
case Intrinsic::dx_splitdouble:

‎llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -193,7 +193,7 @@ class SPIRVInstructionSelector : public InstructionSelector {
193193
bool selectDot4AddPackedExpansion(Register ResVReg, const SPIRVType *ResType,
194194
MachineInstr &I) const;
195195

196-
bool selectWaveActiveSum(Register ResVReg, const SPIRVType *ResType,
196+
bool selectWaveReduceSum(Register ResVReg, const SPIRVType *ResType,
197197
MachineInstr &I) const;
198198

199199
void renderImm32(MachineInstrBuilder &MIB, const MachineInstr &I,
@@ -2062,7 +2062,7 @@ bool SPIRVInstructionSelector::selectWaveActiveCountBits(
20622062
return Result;
20632063
}
20642064

2065-
bool SPIRVInstructionSelector::selectWaveActiveSum(Register ResVReg,
2065+
bool SPIRVInstructionSelector::selectWaveReduceSum(Register ResVReg,
20662066
const SPIRVType *ResType,
20672067
MachineInstr &I) const {
20682068
assert(I.getNumOperands() == 3);
@@ -3009,8 +3009,8 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
30093009
return selectWaveOpInst(ResVReg, ResType, I, SPIRV::OpGroupNonUniformAny);
30103010
case Intrinsic::spv_wave_is_first_lane:
30113011
return selectWaveOpInst(ResVReg, ResType, I, SPIRV::OpGroupNonUniformElect);
3012-
case Intrinsic::spv_wave_active_sum:
3013-
return selectWaveActiveSum(ResVReg, ResType, I);
3012+
case Intrinsic::spv_wave_reduce_sum:
3013+
return selectWaveReduceSum(ResVReg, ResType, I);
30143014
case Intrinsic::spv_wave_readlane:
30153015
return selectWaveOpInst(ResVReg, ResType, I,
30163016
SPIRV::OpGroupNonUniformShuffle);

‎llvm/test/CodeGen/DirectX/WaveActiveSum.ll‎

Lines changed: 30 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -5,77 +5,77 @@
55
define noundef half @wave_active_sum_half(half noundef %expr) {
66
entry:
77
; CHECK: call half @dx.op.waveActiveOp.f16(i32 119, half %expr, i8 0, i8 0)
8-
%ret = call half @llvm.dx.wave.active.sum.f16(half %expr)
8+
%ret = call half @llvm.dx.wave.reduce.sum.f16(half %expr)
99
ret half %ret
1010
}
1111

1212
define noundef float @wave_active_sum_float(float noundef %expr) {
1313
entry:
1414
; CHECK: call float @dx.op.waveActiveOp.f32(i32 119, float %expr, i8 0, i8 0)
15-
%ret = call float @llvm.dx.wave.active.sum.f32(float %expr)
15+
%ret = call float @llvm.dx.wave.reduce.sum.f32(float %expr)
1616
ret float %ret
1717
}
1818

1919
define noundef double @wave_active_sum_double(double noundef %expr) {
2020
entry:
2121
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr, i8 0, i8 0)
22-
%ret = call double @llvm.dx.wave.active.sum.f64(double %expr)
22+
%ret = call double @llvm.dx.wave.reduce.sum.f64(double %expr)
2323
ret double %ret
2424
}
2525

2626
define noundef i16 @wave_active_sum_i16(i16 noundef %expr) {
2727
entry:
2828
; CHECK: call i16 @dx.op.waveActiveOp.i16(i32 119, i16 %expr, i8 0, i8 0)
29-
%ret = call i16 @llvm.dx.wave.active.sum.i16(i16 %expr)
29+
%ret = call i16 @llvm.dx.wave.reduce.sum.i16(i16 %expr)
3030
ret i16 %ret
3131
}
3232

3333
define noundef i32 @wave_active_sum_i32(i32 noundef %expr) {
3434
entry:
3535
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr, i8 0, i8 0)
36-
%ret = call i32 @llvm.dx.wave.active.sum.i32(i32 %expr)
36+
%ret = call i32 @llvm.dx.wave.reduce.sum.i32(i32 %expr)
3737
ret i32 %ret
3838
}
3939

4040
define noundef i64 @wave_active_sum_i64(i64 noundef %expr) {
4141
entry:
4242
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr, i8 0, i8 0)
43-
%ret = call i64 @llvm.dx.wave.active.sum.i64(i64 %expr)
43+
%ret = call i64 @llvm.dx.wave.reduce.sum.i64(i64 %expr)
4444
ret i64 %ret
4545
}
4646

4747
define noundef i16 @wave_active_usum_i16(i16 noundef %expr) {
4848
entry:
4949
; CHECK: call i16 @dx.op.waveActiveOp.i16(i32 119, i16 %expr, i8 0, i8 1)
50-
%ret = call i16 @llvm.dx.wave.active.usum.i16(i16 %expr)
50+
%ret = call i16 @llvm.dx.wave.reduce.usum.i16(i16 %expr)
5151
ret i16 %ret
5252
}
5353

5454
define noundef i32 @wave_active_usum_i32(i32 noundef %expr) {
5555
entry:
5656
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr, i8 0, i8 1)
57-
%ret = call i32 @llvm.dx.wave.active.usum.i32(i32 %expr)
57+
%ret = call i32 @llvm.dx.wave.reduce.usum.i32(i32 %expr)
5858
ret i32 %ret
5959
}
6060

6161
define noundef i64 @wave_active_usum_i64(i64 noundef %expr) {
6262
entry:
6363
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr, i8 0, i8 1)
64-
%ret = call i64 @llvm.dx.wave.active.usum.i64(i64 %expr)
64+
%ret = call i64 @llvm.dx.wave.reduce.usum.i64(i64 %expr)
6565
ret i64 %ret
6666
}
6767

68-
declare half @llvm.dx.wave.active.sum.f16(half)
69-
declare float @llvm.dx.wave.active.sum.f32(float)
70-
declare double @llvm.dx.wave.active.sum.f64(double)
68+
declare half @llvm.dx.wave.reduce.sum.f16(half)
69+
declare float @llvm.dx.wave.reduce.sum.f32(float)
70+
declare double @llvm.dx.wave.reduce.sum.f64(double)
7171

72-
declare i16 @llvm.dx.wave.active.sum.i16(i16)
73-
declare i32 @llvm.dx.wave.active.sum.i32(i32)
74-
declare i64 @llvm.dx.wave.active.sum.i64(i64)
72+
declare i16 @llvm.dx.wave.reduce.sum.i16(i16)
73+
declare i32 @llvm.dx.wave.reduce.sum.i32(i32)
74+
declare i64 @llvm.dx.wave.reduce.sum.i64(i64)
7575

76-
declare i16 @llvm.dx.wave.active.usum.i16(i16)
77-
declare i32 @llvm.dx.wave.active.usum.i32(i32)
78-
declare i64 @llvm.dx.wave.active.usum.i64(i64)
76+
declare i16 @llvm.dx.wave.reduce.usum.i16(i16)
77+
declare i32 @llvm.dx.wave.reduce.usum.i32(i32)
78+
declare i64 @llvm.dx.wave.reduce.usum.i64(i64)
7979

8080
; Test that for vector values, WaveActiveSum scalarizes and maps down to the
8181
; DirectX op
@@ -84,7 +84,7 @@ define noundef <2 x half> @wave_active_sum_v2half(<2 x half> noundef %expr) {
8484
entry:
8585
; CHECK: call half @dx.op.waveActiveOp.f16(i32 119, half %expr.i0, i8 0, i8 0)
8686
; CHECK: call half @dx.op.waveActiveOp.f16(i32 119, half %expr.i1, i8 0, i8 0)
87-
%ret = call <2 x half> @llvm.dx.wave.active.sum.v2f16(<2 x half> %expr)
87+
%ret = call <2 x half> @llvm.dx.wave.reduce.sum.v2f16(<2 x half> %expr)
8888
ret <2 x half> %ret
8989
}
9090

@@ -93,7 +93,7 @@ entry:
9393
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i0, i8 0, i8 0)
9494
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i1, i8 0, i8 0)
9595
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i2, i8 0, i8 0)
96-
%ret = call <3 x i32> @llvm.dx.wave.active.sum.v3i32(<3 x i32> %expr)
96+
%ret = call <3 x i32> @llvm.dx.wave.reduce.sum.v3i32(<3 x i32> %expr)
9797
ret <3 x i32> %ret
9898
}
9999

@@ -103,19 +103,19 @@ entry:
103103
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr.i1, i8 0, i8 0)
104104
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr.i2, i8 0, i8 0)
105105
; CHECK: call double @dx.op.waveActiveOp.f64(i32 119, double %expr.i3, i8 0, i8 0)
106-
%ret = call <4 x double> @llvm.dx.wave.active.sum.v464(<4 x double> %expr)
106+
%ret = call <4 x double> @llvm.dx.wave.reduce.sum.v464(<4 x double> %expr)
107107
ret <4 x double> %ret
108108
}
109109

110-
declare <2 x half> @llvm.dx.wave.active.sum.v2f16(<2 x half>)
111-
declare <3 x i32> @llvm.dx.wave.active.sum.v3i32(<3 x i32>)
112-
declare <4 x double> @llvm.dx.wave.active.sum.v4f64(<4 x double>)
110+
declare <2 x half> @llvm.dx.wave.reduce.sum.v2f16(<2 x half>)
111+
declare <3 x i32> @llvm.dx.wave.reduce.sum.v3i32(<3 x i32>)
112+
declare <4 x double> @llvm.dx.wave.reduce.sum.v4f64(<4 x double>)
113113

114114
define noundef <2 x i16> @wave_active_usum_v2i16(<2 x i16> noundef %expr) {
115115
entry:
116116
; CHECK: call i16 @dx.op.waveActiveOp.i16(i32 119, i16 %expr.i0, i8 0, i8 1)
117117
; CHECK: call i16 @dx.op.waveActiveOp.i16(i32 119, i16 %expr.i1, i8 0, i8 1)
118-
%ret = call <2 x i16> @llvm.dx.wave.active.usum.v2f16(<2 x i16> %expr)
118+
%ret = call <2 x i16> @llvm.dx.wave.reduce.usum.v2f16(<2 x i16> %expr)
119119
ret <2 x i16> %ret
120120
}
121121

@@ -124,7 +124,7 @@ entry:
124124
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i0, i8 0, i8 1)
125125
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i1, i8 0, i8 1)
126126
; CHECK: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 %expr.i2, i8 0, i8 1)
127-
%ret = call <3 x i32> @llvm.dx.wave.active.usum.v3i32(<3 x i32> %expr)
127+
%ret = call <3 x i32> @llvm.dx.wave.reduce.usum.v3i32(<3 x i32> %expr)
128128
ret <3 x i32> %ret
129129
}
130130

@@ -134,10 +134,10 @@ entry:
134134
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr.i1, i8 0, i8 1)
135135
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr.i2, i8 0, i8 1)
136136
; CHECK: call i64 @dx.op.waveActiveOp.i64(i32 119, i64 %expr.i3, i8 0, i8 1)
137-
%ret = call <4 x i64> @llvm.dx.wave.active.usum.v464(<4 x i64> %expr)
137+
%ret = call <4 x i64> @llvm.dx.wave.reduce.usum.v464(<4 x i64> %expr)
138138
ret <4 x i64> %ret
139139
}
140140

141-
declare <2 x i16> @llvm.dx.wave.active.usum.v2f16(<2 x i16>)
142-
declare <3 x i32> @llvm.dx.wave.active.usum.v3i32(<3 x i32>)
143-
declare <4 x i64> @llvm.dx.wave.active.usum.v4f64(<4 x i64>)
141+
declare <2 x i16> @llvm.dx.wave.reduce.usum.v2f16(<2 x i16>)
142+
declare <3 x i32> @llvm.dx.wave.reduce.usum.v3i32(<3 x i32>)
143+
declare <4 x i64> @llvm.dx.wave.reduce.usum.v4f64(<4 x i64>)

‎llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveSum.ll‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@
1414
define float @test_float(float %fexpr) {
1515
entry:
1616
; CHECK: %[[#fret:]] = OpGroupNonUniformFAdd %[[#f32]] %[[#scope]] Reduce %[[#fexpr]]
17-
%0 = call float @llvm.spv.wave.active.sum.f32(float %fexpr)
17+
%0 = call float @llvm.spv.wave.reduce.sum.f32(float %fexpr)
1818
ret float %0
1919
}
2020

@@ -23,7 +23,7 @@ entry:
2323
define i32 @test_int(i32 %iexpr) {
2424
entry:
2525
; CHECK: %[[#iret:]] = OpGroupNonUniformIAdd %[[#uint]] %[[#scope]] Reduce %[[#iexpr]]
26-
%0 = call i32 @llvm.spv.wave.active.sum.i32(i32 %iexpr)
26+
%0 = call i32 @llvm.spv.wave.reduce.sum.i32(i32 %iexpr)
2727
ret i32 %0
2828
}
2929

@@ -32,10 +32,10 @@ entry:
3232
define <4 x half> @test_vhalf(<4 x half> %vbexpr) {
3333
entry:
3434
; CHECK: %[[#vhalfret:]] = OpGroupNonUniformFAdd %[[#v4_half]] %[[#scope]] Reduce %[[#vbexpr]]
35-
%0 = call <4 x half> @llvm.spv.wave.active.sum.v4half(<4 x half> %vbexpr)
35+
%0 = call <4 x half> @llvm.spv.wave.reduce.sum.v4half(<4 x half> %vbexpr)
3636
ret <4 x half> %0
3737
}
3838

39-
declare float @llvm.spv.wave.active.sum.f32(float)
40-
declare i32 @llvm.spv.wave.active.sum.i32(i32)
41-
declare <4 x half> @llvm.spv.wave.active.sum.v4half(<4 x half>)
39+
declare float @llvm.spv.wave.reduce.sum.f32(float)
40+
declare i32 @llvm.spv.wave.reduce.sum.i32(i32)
41+
declare <4 x half> @llvm.spv.wave.reduce.sum.v4half(<4 x half>)

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