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Mel-ChenMel-Chen
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simplify case
1 parent a004d6c commit 348b818

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+34
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1 file changed

+34
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‎llvm/test/Transforms/LoopVectorize/RISCV/vplan-riscv-vector-reverse.ll‎

Lines changed: 34 additions & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -16,20 +16,19 @@ define void @vector_reverse_i64(ptr nocapture noundef writeonly %A, ptr nocaptur
1616
; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
1717
; CHECK-NEXT: vp<[[OTC:%.+]]> = original trip-count
1818
; CHECK-EMPTY:
19-
; CHECK-NEXT: ir-bb<for.body.preheader>:
20-
; CHECK-NEXT: IR [[N_ZEXT:%.+]] = zext i32 [[N:%.+]] to i64
21-
; CHECK-NEXT: EMIT vp<[[OTC]]> = EXPAND SCEV (zext i32 [[N]] to i64)
19+
; CHECK-NEXT: ir-bb<entry>:
20+
; CHECK-NEXT: EMIT vp<[[OTC]]> = EXPAND SCEV (1 + (-1 * (1 umin %n))<nuw><nsw> + %n)
2221
; CHECK-NEXT: Successor(s): scalar.ph, vector.ph
2322
; CHECK-EMPTY:
2423
; CHECK-NEXT: vector.ph:
25-
; CHECK-NEXT: vp<[[RESUME_IV_A:%.+]]> = DERIVED-IV ir<[[N_ZEXT]]> + vp<[[VTC]]> * ir<-1>
26-
; CHECK-NEXT: vp<[[RESUME_IV_B:%.+]]> = DERIVED-IV ir<[[N]]> + vp<[[VTC]]> * ir<-1>
24+
; CHECK-NEXT: vp<[[RESUME_IV_A:%.+]]> = DERIVED-IV ir<%n> + vp<[[VTC]]> * ir<-1>
25+
; CHECK-NEXT: vp<[[RESUME_IV_B:%.+]]> = DERIVED-IV ir<%n> + vp<[[VTC]]> * ir<-1>
2726
; CHECK-NEXT: Successor(s): vector loop
2827
; CHECK-EMPTY:
2928
; CHECK-NEXT: <x1> vector loop: {
3029
; CHECK-NEXT: vector.body:
3130
; CHECK-NEXT: EMIT vp<[[INDUCTION:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[INDEX_NEXT:%.+]]>
32-
; CHECK-NEXT: vp<[[DERIVED_IV:%.+]]> = DERIVED-IV ir<[[N]]> + vp<[[INDUCTION]]> * ir<-1>
31+
; CHECK-NEXT: vp<[[DERIVED_IV:%.+]]> = DERIVED-IV ir<%n> + vp<[[INDUCTION]]> * ir<-1>
3332
; CHECK-NEXT: vp<[[SCALAR_STEPS:%.+]]> = SCALAR-STEPS vp<[[DERIVED_IV]]>, ir<-1>, vp<[[VF]]>
3433
; CHECK-NEXT: CLONE ir<[[IDX:%.+]]> = add nsw vp<[[SCALAR_STEPS]]>, ir<-1>
3534
; CHECK-NEXT: CLONE ir<[[IDX_PROM:%.+]]> = zext ir<[[IDX]]>
@@ -49,40 +48,35 @@ define void @vector_reverse_i64(ptr nocapture noundef writeonly %A, ptr nocaptur
4948
; CHECK-NEXT: middle.block:
5049
; CHECK-NEXT: EMIT vp<[[CMP:%.+]]> = icmp eq vp<[[OTC]]>, vp<[[VTC]]>
5150
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
52-
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup.loopexit>, scalar.ph
51+
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup>, scalar.ph
5352
; CHECK-EMPTY:
54-
; CHECK-NEXT: ir-bb<for.cond.cleanup.loopexit>:
53+
; CHECK-NEXT: ir-bb<for.cond.cleanup>:
5554
; CHECK-NEXT: No successors
5655
; CHECK-EMPTY:
5756
; CHECK-NEXT: scalar.ph:
58-
; CHECK-NEXT: EMIT-SCALAR vp<%bc.resume.val> = phi [ vp<[[RESUME_IV_A]]>, middle.block ], [ ir<[[N_ZEXT]]>, ir-bb<for.body.preheader> ]
59-
; CHECK-NEXT: EMIT-SCALAR vp<%bc.resume.val>.1 = phi [ vp<[[RESUME_IV_B]]>, middle.block ], [ ir<[[N]]>, ir-bb<for.body.preheader> ]
57+
; CHECK-NEXT: EMIT-SCALAR vp<%bc.resume.val> = phi [ vp<[[RESUME_IV_A]]>, middle.block ], [ ir<%n>, ir-bb<entry> ]
58+
; CHECK-NEXT: EMIT-SCALAR vp<%bc.resume.val>.1 = phi [ vp<[[RESUME_IV_B]]>, middle.block ], [ ir<%n>, ir-bb<entry> ]
6059
; CHECK-NEXT: Successor(s): ir-bb<for.body>
6160
;
6261
entry:
63-
%cmp7 = icmp sgt i32 %n, 0
64-
br i1 %cmp7, label %for.body.preheader, label %for.cond.cleanup
65-
66-
for.body.preheader: ; preds = %entry
67-
%0 = zext i32 %n to i64
6862
br label %for.body
6963

70-
for.cond.cleanup: ; preds = %for.body, %entry
71-
ret void
72-
73-
for.body: ; preds = %for.body.preheader, %for.body
74-
%indvars.iv = phi i64 [ %0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
75-
%i.0.in8 = phi i32 [ %n, %for.body.preheader ], [ %i.0, %for.body ]
64+
for.body:
65+
%indvars.iv = phi i32 [ %n, %entry ], [ %indvars.iv.next, %for.body ]
66+
%i.0.in8 = phi i32 [ %n, %entry ], [ %i.0, %for.body ]
7667
%i.0 = add nsw i32 %i.0.in8, -1
7768
%idxprom = zext i32 %i.0 to i64
7869
%arrayidx = getelementptr inbounds i32, ptr %B, i64 %idxprom
7970
%1 = load i32, ptr %arrayidx, align 4
8071
%add9 = add i32 %1, 1
8172
%arrayidx3 = getelementptr inbounds i32, ptr %A, i64 %idxprom
8273
store i32 %add9, ptr %arrayidx3, align 4
83-
%cmp = icmp ugt i64 %indvars.iv, 1
84-
%indvars.iv.next = add nsw i64 %indvars.iv, -1
74+
%cmp = icmp ugt i32 %indvars.iv, 1
75+
%indvars.iv.next = add nsw i32 %indvars.iv, -1
8576
br i1 %cmp, label %for.body, label %for.cond.cleanup
77+
78+
for.cond.cleanup:
79+
ret void
8680
}
8781

8882
define void @vector_reverse_f32(ptr nocapture noundef writeonly %A, ptr nocapture noundef readonly %B, i32 noundef signext %n) {
@@ -92,20 +86,19 @@ define void @vector_reverse_f32(ptr nocapture noundef writeonly %A, ptr nocaptur
9286
; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
9387
; CHECK-NEXT: vp<[[OTC:%.+]]> = original trip-count
9488
; CHECK-EMPTY:
95-
; CHECK-NEXT: ir-bb<for.body.preheader>:
96-
; CHECK-NEXT: IR [[N_ZEXT:%.+]] = zext i32 [[N:%.+]] to i64
97-
; CHECK-NEXT: EMIT vp<[[OTC]]> = EXPAND SCEV (zext i32 [[N]] to i64)
89+
; CHECK-NEXT: ir-bb<entry>:
90+
; CHECK-NEXT: EMIT vp<[[OTC]]> = EXPAND SCEV (1 + (-1 * (1 umin %n))<nuw><nsw> + %n)
9891
; CHECK-NEXT: Successor(s): scalar.ph, vector.ph
9992
; CHECK-EMPTY:
10093
; CHECK-NEXT: vector.ph:
101-
; CHECK-NEXT: vp<[[RESUME_IV_A:%.+]]> = DERIVED-IV ir<[[N_ZEXT]]> + vp<[[VTC]]> * ir<-1>
102-
; CHECK-NEXT: vp<[[RESUME_IV_B:%.+]]> = DERIVED-IV ir<[[N]]> + vp<[[VTC]]> * ir<-1>
94+
; CHECK-NEXT: vp<[[RESUME_IV_A:%.+]]> = DERIVED-IV ir<%n> + vp<[[VTC]]> * ir<-1>
95+
; CHECK-NEXT: vp<[[RESUME_IV_B:%.+]]> = DERIVED-IV ir<%n> + vp<[[VTC]]> * ir<-1>
10396
; CHECK-NEXT: Successor(s): vector loop
10497
; CHECK-EMPTY:
10598
; CHECK-NEXT: <x1> vector loop: {
10699
; CHECK-NEXT: vector.body:
107100
; CHECK-NEXT: EMIT vp<[[INDUCTION:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[INDEX_NEXT:%.+]]>
108-
; CHECK-NEXT: vp<[[DERIVED_IV:%.+]]> = DERIVED-IV ir<[[N]]> + vp<[[INDUCTION]]> * ir<-1>
101+
; CHECK-NEXT: vp<[[DERIVED_IV:%.+]]> = DERIVED-IV ir<%n> + vp<[[INDUCTION]]> * ir<-1>
109102
; CHECK-NEXT: vp<[[SCALAR_STEPS:%.+]]> = SCALAR-STEPS vp<[[DERIVED_IV]]>, ir<-1>, vp<[[VF]]>
110103
; CHECK-NEXT: CLONE ir<[[IDX:%.+]]> = add nsw vp<[[SCALAR_STEPS]]>, ir<-1>
111104
; CHECK-NEXT: CLONE ir<[[IDX_PROM:%.+]]> = zext ir<[[IDX]]>
@@ -125,38 +118,33 @@ define void @vector_reverse_f32(ptr nocapture noundef writeonly %A, ptr nocaptur
125118
; CHECK-NEXT: middle.block:
126119
; CHECK-NEXT: EMIT vp<[[CMP:%.+]]> = icmp eq vp<[[OTC]]>, vp<[[VTC]]>
127120
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
128-
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup.loopexit>, scalar.ph
121+
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup>, scalar.ph
129122
; CHECK-EMPTY:
130-
; CHECK-NEXT: ir-bb<for.cond.cleanup.loopexit>:
123+
; CHECK-NEXT: ir-bb<for.cond.cleanup>:
131124
; CHECK-NEXT: No successors
132125
; CHECK-EMPTY:
133126
; CHECK-NEXT: scalar.ph:
134-
; CHECK-NEXT: EMIT-SCALAR vp<%bc.resume.val> = phi [ vp<[[RESUME_IV_A]]>, middle.block ], [ ir<[[N_ZEXT]]>, ir-bb<for.body.preheader> ]
135-
; CHECK-NEXT: EMIT-SCALAR vp<%bc.resume.val>.1 = phi [ vp<[[RESUME_IV_B]]>, middle.block ], [ ir<[[N]]>, ir-bb<for.body.preheader> ]
127+
; CHECK-NEXT: EMIT-SCALAR vp<%bc.resume.val> = phi [ vp<[[RESUME_IV_A]]>, middle.block ], [ ir<%n>, ir-bb<entry> ]
128+
; CHECK-NEXT: EMIT-SCALAR vp<%bc.resume.val>.1 = phi [ vp<[[RESUME_IV_B]]>, middle.block ], [ ir<%n>, ir-bb<entry> ]
136129
; CHECK-NEXT: Successor(s): ir-bb<for.body>
137130
;
138131
entry:
139-
%cmp7 = icmp sgt i32 %n, 0
140-
br i1 %cmp7, label %for.body.preheader, label %for.cond.cleanup
141-
142-
for.body.preheader: ; preds = %entry
143-
%0 = zext i32 %n to i64
144132
br label %for.body
145133

146-
for.cond.cleanup: ; preds = %for.body, %entry
147-
ret void
148-
149-
for.body: ; preds = %for.body.preheader, %for.body
150-
%indvars.iv = phi i64 [ %0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
151-
%i.0.in8 = phi i32 [ %n, %for.body.preheader ], [ %i.0, %for.body ]
134+
for.body:
135+
%indvars.iv = phi i32 [ %n, %entry ], [ %indvars.iv.next, %for.body ]
136+
%i.0.in8 = phi i32 [ %n, %entry ], [ %i.0, %for.body ]
152137
%i.0 = add nsw i32 %i.0.in8, -1
153138
%idxprom = zext i32 %i.0 to i64
154139
%arrayidx = getelementptr inbounds float, ptr %B, i64 %idxprom
155140
%1 = load float, ptr %arrayidx, align 4
156141
%conv1 = fadd float %1, 1.000000e+00
157142
%arrayidx3 = getelementptr inbounds float, ptr %A, i64 %idxprom
158143
store float %conv1, ptr %arrayidx3, align 4
159-
%cmp = icmp ugt i64 %indvars.iv, 1
160-
%indvars.iv.next = add nsw i64 %indvars.iv, -1
144+
%cmp = icmp ugt i32 %indvars.iv, 1
145+
%indvars.iv.next = add nsw i32 %indvars.iv, -1
161146
br i1 %cmp, label %for.body, label %for.cond.cleanup
147+
148+
for.cond.cleanup:
149+
ret void
162150
}

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