@@ -60,10 +60,14 @@ namespace {
6060// ===----------------------------------------------------------------------===//
6161
6262// / Helper class for tracking the analysis state of an mlir value. For layout
63- // / propagation, the analysis state is simply the lane_layout and lane_data of
64- // / each value. Purpose of this analysis to propagate some unique layout for
65- // / each value in the program starting from a set of anchor operations (like
66- // / DPAS, StoreNd, etc.).
63+ // / propagation, the analysis state is simply the distribution layout of
64+ // / each value. The distribution layout information is encapsulated using
65+ // / xegpu::DistributeLayoutAttr class which can hold information about any type
66+ // / of distribution layout that XeGPU dialect supports. Purpose of this analysis
67+ // / to propagate some unique distribution layout for each value in the program
68+ // / starting from a set of anchor operations (like DPAS, StoreNd, etc.). Note
69+ // / that analysis will reach a fixed point when all values are reached some
70+ // / layout and, analysis does not try to modify any already assigned layouts.
6771// /
6872// / Given this, LayoutInfo satisifies the following properties:
6973// / 1) A LayoutInfo value can be in one of two states - `assigned` or `not
@@ -99,25 +103,9 @@ struct LayoutInfo {
99103
100104 LayoutInfo transpose (ArrayRef<int64_t > permutation) const ;
101105
102- SmallVector<int > getLaneLayout () const {
103- if (!isAssigned ())
104- return {};
105- assert (storage.getLaneLayoutAsInt ().size () &&
106- " Expected lane layout to be assigned" );
107- return llvm::map_to_vector (storage.getLaneLayoutAsInt (), [](int64_t val) {
108- return static_cast <int >(val);
109- });
110- }
106+ SmallVector<int > getLaneLayout () const ;
111107
112- SmallVector<int > getLaneData () const {
113- if (!isAssigned ())
114- return {};
115- assert (storage.getLaneDataAsInt ().size () &&
116- " Expected lane data to be assigned" );
117- return llvm::map_to_vector (storage.getLaneDataAsInt (), [](int64_t val) {
118- return static_cast <int >(val);
119- });
120- }
108+ SmallVector<int > getLaneData () const ;
121109
122110 bool isSliceLayout () const {
123111 if (!isAssigned ())
@@ -128,6 +116,24 @@ struct LayoutInfo {
128116 Attribute get () { return storage; }
129117};
130118
119+ SmallVector<int > LayoutInfo::getLaneLayout () const {
120+ if (!isAssigned ())
121+ return {};
122+ assert (storage.getLaneLayoutAsInt ().size () &&
123+ " Expected lane layout to be assigned" );
124+ return llvm::map_to_vector (storage.getLaneLayoutAsInt (),
125+ [](int64_t val) { return static_cast <int >(val); });
126+ }
127+
128+ SmallVector<int > LayoutInfo::getLaneData () const {
129+ if (!isAssigned ())
130+ return {};
131+ assert (storage.getLaneDataAsInt ().size () &&
132+ " Expected lane data to be assigned" );
133+ return llvm::map_to_vector (storage.getLaneDataAsInt (),
134+ [](int64_t val) { return static_cast <int >(val); });
135+ }
136+
131137void LayoutInfo::print (raw_ostream &os) const {
132138 if (isAssigned ()) {
133139 os << storage;
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