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modify func name for lasx
1 parent 7f017ae commit 3500ddb

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4 files changed

+34
-34
lines changed

4 files changed

+34
-34
lines changed

‎llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sadd-sat.ll‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32
33
; RUN: llc -mtriple=loongarch64 -mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64
44

5-
define <32 x i8> @vsadd_b(<32 x i8> %a, <32 x i8> %b) {
6-
; CHECK-LABEL: vsadd_b:
5+
define <32 x i8> @xvsadd_b(<32 x i8> %a, <32 x i8> %b) {
6+
; CHECK-LABEL: xvsadd_b:
77
; CHECK: # %bb.0:
88
; CHECK-NEXT: xvadd.b $xr2, $xr0, $xr1
99
; CHECK-NEXT: xvslt.b $xr0, $xr2, $xr0
@@ -17,8 +17,8 @@ define <32 x i8> @vsadd_b(<32 x i8> %a, <32 x i8> %b) {
1717
ret <32 x i8> %ret
1818
}
1919

20-
define <16 x i16> @vsadd_h(<16 x i16> %a, <16 x i16> %b) {
21-
; CHECK-LABEL: vsadd_h:
20+
define <16 x i16> @xvsadd_h(<16 x i16> %a, <16 x i16> %b) {
21+
; CHECK-LABEL: xvsadd_h:
2222
; CHECK: # %bb.0:
2323
; CHECK-NEXT: xvadd.h $xr2, $xr0, $xr1
2424
; CHECK-NEXT: xvslt.h $xr0, $xr2, $xr0
@@ -32,8 +32,8 @@ define <16 x i16> @vsadd_h(<16 x i16> %a, <16 x i16> %b) {
3232
ret <16 x i16> %ret
3333
}
3434

35-
define <8 x i32> @vsadd_w(<8 x i32> %a, <8 x i32> %b) {
36-
; CHECK-LABEL: vsadd_w:
35+
define <8 x i32> @xvsadd_w(<8 x i32> %a, <8 x i32> %b) {
36+
; CHECK-LABEL: xvsadd_w:
3737
; CHECK: # %bb.0:
3838
; CHECK-NEXT: xvadd.w $xr2, $xr0, $xr1
3939
; CHECK-NEXT: xvslt.w $xr0, $xr2, $xr0
@@ -47,8 +47,8 @@ define <8 x i32> @vsadd_w(<8 x i32> %a, <8 x i32> %b) {
4747
ret <8 x i32> %ret
4848
}
4949

50-
define <4 x i64> @vsadd_d(<4 x i64> %a, <4 x i64> %b) {
51-
; LA32-LABEL: vsadd_d:
50+
define <4 x i64> @xvsadd_d(<4 x i64> %a, <4 x i64> %b) {
51+
; LA32-LABEL: xvsadd_d:
5252
; LA32: # %bb.0:
5353
; LA32-NEXT: xvadd.d $xr2, $xr0, $xr1
5454
; LA32-NEXT: xvslt.d $xr0, $xr2, $xr0
@@ -61,7 +61,7 @@ define <4 x i64> @vsadd_d(<4 x i64> %a, <4 x i64> %b) {
6161
; LA32-NEXT: xvbitsel.v $xr0, $xr2, $xr1, $xr0
6262
; LA32-NEXT: ret
6363
;
64-
; LA64-LABEL: vsadd_d:
64+
; LA64-LABEL: xvsadd_d:
6565
; LA64: # %bb.0:
6666
; LA64-NEXT: xvadd.d $xr2, $xr0, $xr1
6767
; LA64-NEXT: xvslt.d $xr0, $xr2, $xr0

‎llvm/test/CodeGen/LoongArch/lasx/ir-instruction/ssub-sat.ll‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32
33
; RUN: llc -mtriple=loongarch64 -mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64
44

5-
define <32 x i8> @vssub_b(<32 x i8> %a, <32 x i8> %b) {
6-
; CHECK-LABEL: vssub_b:
5+
define <32 x i8> @xvssub_b(<32 x i8> %a, <32 x i8> %b) {
6+
; CHECK-LABEL: xvssub_b:
77
; CHECK: # %bb.0:
88
; CHECK-NEXT: xvrepli.b $xr2, 0
99
; CHECK-NEXT: xvslt.b $xr2, $xr2, $xr1
@@ -18,8 +18,8 @@ define <32 x i8> @vssub_b(<32 x i8> %a, <32 x i8> %b) {
1818
ret <32 x i8> %ret
1919
}
2020

21-
define <16 x i16> @vssub_h(<16 x i16> %a, <16 x i16> %b) {
22-
; CHECK-LABEL: vssub_h:
21+
define <16 x i16> @xvssub_h(<16 x i16> %a, <16 x i16> %b) {
22+
; CHECK-LABEL: xvssub_h:
2323
; CHECK: # %bb.0:
2424
; CHECK-NEXT: xvrepli.b $xr2, 0
2525
; CHECK-NEXT: xvslt.h $xr2, $xr2, $xr1
@@ -34,8 +34,8 @@ define <16 x i16> @vssub_h(<16 x i16> %a, <16 x i16> %b) {
3434
ret <16 x i16> %ret
3535
}
3636

37-
define <8 x i32> @vssub_w(<8 x i32> %a, <8 x i32> %b) {
38-
; CHECK-LABEL: vssub_w:
37+
define <8 x i32> @xvssub_w(<8 x i32> %a, <8 x i32> %b) {
38+
; CHECK-LABEL: xvssub_w:
3939
; CHECK: # %bb.0:
4040
; CHECK-NEXT: xvrepli.b $xr2, 0
4141
; CHECK-NEXT: xvslt.w $xr2, $xr2, $xr1
@@ -50,8 +50,8 @@ define <8 x i32> @vssub_w(<8 x i32> %a, <8 x i32> %b) {
5050
ret <8 x i32> %ret
5151
}
5252

53-
define <4 x i64> @vssub_d(<4 x i64> %a, <4 x i64> %b) {
54-
; LA32-LABEL: vssub_d:
53+
define <4 x i64> @xvssub_d(<4 x i64> %a, <4 x i64> %b) {
54+
; LA32-LABEL: xvssub_d:
5555
; LA32: # %bb.0:
5656
; LA32-NEXT: xvrepli.b $xr2, 0
5757
; LA32-NEXT: xvslt.d $xr2, $xr2, $xr1
@@ -65,7 +65,7 @@ define <4 x i64> @vssub_d(<4 x i64> %a, <4 x i64> %b) {
6565
; LA32-NEXT: xvbitsel.v $xr0, $xr1, $xr2, $xr0
6666
; LA32-NEXT: ret
6767
;
68-
; LA64-LABEL: vssub_d:
68+
; LA64-LABEL: xvssub_d:
6969
; LA64: # %bb.0:
7070
; LA64-NEXT: xvrepli.b $xr2, 0
7171
; LA64-NEXT: xvslt.d $xr2, $xr2, $xr1

‎llvm/test/CodeGen/LoongArch/lasx/ir-instruction/uadd-sat.ll‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s
33
; RUN: llc -mtriple=loongarch64 -mattr=+lasx < %s | FileCheck %s
44

5-
define <32 x i8> @vuadd_b(<32 x i8> %a, <32 x i8> %b) {
6-
; CHECK-LABEL: vuadd_b:
5+
define <32 x i8> @xvuadd_b(<32 x i8> %a, <32 x i8> %b) {
6+
; CHECK-LABEL: xvuadd_b:
77
; CHECK: # %bb.0:
88
; CHECK-NEXT: xvxori.b $xr2, $xr1, 255
99
; CHECK-NEXT: xvmin.bu $xr0, $xr0, $xr2
@@ -13,8 +13,8 @@ define <32 x i8> @vuadd_b(<32 x i8> %a, <32 x i8> %b) {
1313
ret <32 x i8> %ret
1414
}
1515

16-
define <16 x i16> @vuadd_h(<16 x i16> %a, <16 x i16> %b) {
17-
; CHECK-LABEL: vuadd_h:
16+
define <16 x i16> @xvuadd_h(<16 x i16> %a, <16 x i16> %b) {
17+
; CHECK-LABEL: xvuadd_h:
1818
; CHECK: # %bb.0:
1919
; CHECK-NEXT: xvrepli.b $xr2, -1
2020
; CHECK-NEXT: xvxor.v $xr2, $xr1, $xr2
@@ -25,8 +25,8 @@ define <16 x i16> @vuadd_h(<16 x i16> %a, <16 x i16> %b) {
2525
ret <16 x i16> %ret
2626
}
2727

28-
define <8 x i32> @vuadd_w(<8 x i32> %a, <8 x i32> %b) {
29-
; CHECK-LABEL: vuadd_w:
28+
define <8 x i32> @xvuadd_w(<8 x i32> %a, <8 x i32> %b) {
29+
; CHECK-LABEL: xvuadd_w:
3030
; CHECK: # %bb.0:
3131
; CHECK-NEXT: xvrepli.b $xr2, -1
3232
; CHECK-NEXT: xvxor.v $xr2, $xr1, $xr2
@@ -37,8 +37,8 @@ define <8 x i32> @vuadd_w(<8 x i32> %a, <8 x i32> %b) {
3737
ret <8 x i32> %ret
3838
}
3939

40-
define <4 x i64> @vuadd_d(<4 x i64> %a, <4 x i64> %b) {
41-
; CHECK-LABEL: vuadd_d:
40+
define <4 x i64> @xvuadd_d(<4 x i64> %a, <4 x i64> %b) {
41+
; CHECK-LABEL: xvuadd_d:
4242
; CHECK: # %bb.0:
4343
; CHECK-NEXT: xvrepli.b $xr2, -1
4444
; CHECK-NEXT: xvxor.v $xr2, $xr1, $xr2

‎llvm/test/CodeGen/LoongArch/lasx/ir-instruction/usub-sat.ll‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s
33
; RUN: llc -mtriple=loongarch64 -mattr=+lasx < %s | FileCheck %s
44

5-
define <32 x i8> @vusub_b(<32 x i8> %a, <32 x i8> %b) {
6-
; CHECK-LABEL: vusub_b:
5+
define <32 x i8> @xvusub_b(<32 x i8> %a, <32 x i8> %b) {
6+
; CHECK-LABEL: xvusub_b:
77
; CHECK: # %bb.0:
88
; CHECK-NEXT: xvmax.bu $xr0, $xr0, $xr1
99
; CHECK-NEXT: xvsub.b $xr0, $xr0, $xr1
@@ -12,8 +12,8 @@ define <32 x i8> @vusub_b(<32 x i8> %a, <32 x i8> %b) {
1212
ret <32 x i8> %ret
1313
}
1414

15-
define <16 x i16> @vusub_h(<16 x i16> %a, <16 x i16> %b) {
16-
; CHECK-LABEL: vusub_h:
15+
define <16 x i16> @xvusub_h(<16 x i16> %a, <16 x i16> %b) {
16+
; CHECK-LABEL: xvusub_h:
1717
; CHECK: # %bb.0:
1818
; CHECK-NEXT: xvmax.hu $xr0, $xr0, $xr1
1919
; CHECK-NEXT: xvsub.h $xr0, $xr0, $xr1
@@ -22,8 +22,8 @@ define <16 x i16> @vusub_h(<16 x i16> %a, <16 x i16> %b) {
2222
ret <16 x i16> %ret
2323
}
2424

25-
define <8 x i32> @vusub_w(<8 x i32> %a, <8 x i32> %b) {
26-
; CHECK-LABEL: vusub_w:
25+
define <8 x i32> @xvusub_w(<8 x i32> %a, <8 x i32> %b) {
26+
; CHECK-LABEL: xvusub_w:
2727
; CHECK: # %bb.0:
2828
; CHECK-NEXT: xvmax.wu $xr0, $xr0, $xr1
2929
; CHECK-NEXT: xvsub.w $xr0, $xr0, $xr1
@@ -32,8 +32,8 @@ define <8 x i32> @vusub_w(<8 x i32> %a, <8 x i32> %b) {
3232
ret <8 x i32> %ret
3333
}
3434

35-
define <4 x i64> @vusub_d(<4 x i64> %a, <4 x i64> %b) {
36-
; CHECK-LABEL: vusub_d:
35+
define <4 x i64> @xvusub_d(<4 x i64> %a, <4 x i64> %b) {
36+
; CHECK-LABEL: xvusub_d:
3737
; CHECK: # %bb.0:
3838
; CHECK-NEXT: xvmax.du $xr0, $xr0, $xr1
3939
; CHECK-NEXT: xvsub.d $xr0, $xr0, $xr1

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