Insert trap for 64-bit offsets on X86 32-bit targets

This prevents the verify instruction pass from reporting the offsets as
erroneous when we've already reported the error to the user.

Add `-verify-machineinstrs` to tests for large displacements to catch
simliar issues.

Author: wesleywiser

llvm/lib/Target/X86/X86RegisterInfo.cpp

@@ -959,15 +959,15 @@ X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
   }
 
   if (MI.getOperand(FIOperandNum+3).isImm()) {
+    const X86InstrInfo *TII = MF.getSubtarget<X86Subtarget>().getInstrInfo();
+    const DebugLoc &DL = MI.getDebugLoc();
     int64_t Imm = MI.getOperand(FIOperandNum + 3).getImm();
     int64_t Offset = FIOffset + Imm;
     bool FitsIn32Bits = isInt<32>(Offset);
     // If the offset will not fit in a 32-bit displacement, then for 64-bit
     // targets, scavenge a register to hold it. Otherwise...
     if (Is64Bit && !FitsIn32Bits) {
       assert(RS && "RegisterScavenger was NULL");
-      const X86InstrInfo *TII = MF.getSubtarget<X86Subtarget>().getInstrInfo();
-      const DebugLoc &DL = MI.getDebugLoc();
 
       RS->enterBasicBlockEnd(MBB);
       RS->backward(std::next(II));
@@ -987,8 +987,12 @@ X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
     }
 
     // ... for 32-bit targets, this is a bug!
-    if (!Is64Bit && !FitsIn32Bits)
+    if (!Is64Bit && !FitsIn32Bits) {
       MI.emitGenericError("64-bit offset calculated but target is 32-bit");
+      // Trap so that the instruction verification pass does not fail if run.
+      BuildMI(MBB, MBBI, DL, TII->get(X86::TRAP));
+      return false;
+    }
 
     if (Offset != 0 || !tryOptimizeLEAtoMOV(II))
       MI.getOperand(FIOperandNum + 3).ChangeToImmediate(Offset);

llvm/test/CodeGen/X86/avx512f-large-stack.ll

@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --version 4
-; RUN: llc -O0 -mtriple=x86_64 -mattr=+avx512f < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -O0 -mtriple=x86_64 -mattr=+avx512f -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK
 define void @f(i16 %LGV2, i1 %LGV3) {
 ; CHECK-LABEL: f:
 ; CHECK:       # %bb.0: # %BB

llvm/test/CodeGen/X86/large-displacements-fastisel.ll

@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64 -O=0 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64 -O=0 -verify-machineinstrs | FileCheck %s
 @G = global i8 0
 
 ; Regression test for PR113856 - incorrect FastISel assert

llvm/test/CodeGen/X86/large-displacements.ll

@@ -1,5 +1,5 @@
-; RUN: not llc < %s -mtriple=i686 -filetype=null 2>&1 | FileCheck %s -check-prefix=ERR-i686
-; RUN: llc < %s -mtriple=x86_64 | FileCheck %s -check-prefix=x86_64
+; RUN: not llc < %s -mtriple=i686 -filetype=null -verify-machineinstrs 2>&1 | FileCheck %s -check-prefix=ERR-i686
+; RUN: llc < %s -mtriple=x86_64 -verify-machineinstrs | FileCheck %s -check-prefix=x86_64
 
 ; Regression test for #121932, #113856, #106352, #69365, #25051 which are caused by
 ; an incorrectly written assertion for 64-bit offsets when compiling for 32-bit X86.