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[M68k] Fix incorrect boolean content type
M68k's SETCC instruction (`scc`) distinctly fills the destination byte with all 1s. If boolean contents are set to `ZeroOrOneBooleanContent`, LLVM can mistakenly think the destination holds `0x01` instead of `0xff` and emit broken code as a result. This change corrects the boolean content type to `ZeroOrNegativeOneBooleanContent`.
1 parent 1ddb909 commit 3565d7a

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6 files changed

+50
-26
lines changed

6 files changed

+50
-26
lines changed

‎llvm/lib/Target/M68k/M68kISelLowering.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -51,7 +51,7 @@ M68kTargetLowering::M68kTargetLowering(const M68kTargetMachine &TM,
5151

5252
MVT PtrVT = MVT::i32;
5353

54-
setBooleanContents(ZeroOrOneBooleanContent);
54+
setBooleanContents(ZeroOrNegativeOneBooleanContent);
5555

5656
auto *RegInfo = Subtarget.getRegisterInfo();
5757
setStackPointerRegisterToSaveRestore(RegInfo->getStackRegister());

‎llvm/test/CodeGen/M68k/Arith/add.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -85,9 +85,9 @@ define fastcc i32 @test9(i32 %x, i32 %y) nounwind readnone {
8585
; CHECK: ; %bb.0:
8686
; CHECK-NEXT: sub.l #10, %d0
8787
; CHECK-NEXT: seq %d0
88-
; CHECK-NEXT: and.l #255, %d0
89-
; CHECK-NEXT: sub.l %d0, %d1
90-
; CHECK-NEXT: move.l %d1, %d0
88+
; CHECK-NEXT: ext.w %d0
89+
; CHECK-NEXT: ext.l %d0
90+
; CHECK-NEXT: add.l %d1, %d0
9191
; CHECK-NEXT: rts
9292
%cmp = icmp eq i32 %x, 10
9393
%sub = sext i1 %cmp to i32

‎llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -102,8 +102,9 @@ define fastcc i1 @test2(i32 %v1, i32 %v2) nounwind {
102102
; CHECK-NEXT: suba.l #12, %sp
103103
; CHECK-NEXT: muls.l %d1, %d0
104104
; CHECK-NEXT: svs %d1
105-
; CHECK-NEXT: sub.b #1, %d1
106-
; CHECK-NEXT: bne .LBB4_2
105+
; CHECK-NEXT: and.b #1, %d1
106+
; CHECK-NEXT: cmpi.b #0, %d1
107+
; CHECK-NEXT: beq .LBB4_2
107108
; CHECK-NEXT: ; %bb.1: ; %overflow
108109
; CHECK-NEXT: lea (no,%pc), %a0
109110
; CHECK-NEXT: move.l %a0, (%sp)

‎llvm/test/CodeGen/M68k/Control/cmp.ll

Lines changed: 16 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -84,6 +84,7 @@ define i64 @test3(i64 %x) nounwind {
8484
; CHECK-NEXT: seq %d0
8585
; CHECK-NEXT: move.l %d0, %d1
8686
; CHECK-NEXT: and.l #255, %d1
87+
; CHECK-NEXT: and.l #1, %d1
8788
; CHECK-NEXT: moveq #0, %d0
8889
; CHECK-NEXT: rts
8990
%t = icmp eq i64 %x, 0
@@ -103,6 +104,7 @@ define i64 @test4(i64 %x) nounwind {
103104
; CHECK-NEXT: subx.l %d0, %d1
104105
; CHECK-NEXT: slt %d1
105106
; CHECK-NEXT: and.l #255, %d1
107+
; CHECK-NEXT: and.l #1, %d1
106108
; CHECK-NEXT: movem.l (0,%sp), %d2 ; 8-byte Folded Reload
107109
; CHECK-NEXT: adda.l #4, %sp
108110
; CHECK-NEXT: rts
@@ -144,6 +146,7 @@ define i32 @test7(i64 %res) nounwind {
144146
; CHECK-NEXT: cmpi.l #0, (4,%sp)
145147
; CHECK-NEXT: seq %d0
146148
; CHECK-NEXT: and.l #255, %d0
149+
; CHECK-NEXT: and.l #1, %d0
147150
; CHECK-NEXT: rts
148151
entry:
149152
%lnot = icmp ult i64 %res, 4294967296
@@ -158,6 +161,7 @@ define i32 @test8(i64 %res) nounwind {
158161
; CHECK-NEXT: sub.l #3, %d0
159162
; CHECK-NEXT: scs %d0
160163
; CHECK-NEXT: and.l #255, %d0
164+
; CHECK-NEXT: and.l #1, %d0
161165
; CHECK-NEXT: rts
162166
entry:
163167
%lnot = icmp ult i64 %res, 12884901888
@@ -173,6 +177,7 @@ define i32 @test11(i64 %l) nounwind {
173177
; CHECK-NEXT: sub.l #32768, %d0
174178
; CHECK-NEXT: seq %d0
175179
; CHECK-NEXT: and.l #255, %d0
180+
; CHECK-NEXT: and.l #1, %d0
176181
; CHECK-NEXT: rts
177182
entry:
178183
%shr.mask = and i64 %l, -140737488355328
@@ -240,6 +245,7 @@ define zeroext i1 @test15(i32 %bf.load, i32 %n) {
240245
; CHECK-NEXT: or.b %d0, %d1
241246
; CHECK-NEXT: move.l %d1, %d0
242247
; CHECK-NEXT: and.l #255, %d0
248+
; CHECK-NEXT: and.l #1, %d0
243249
; CHECK-NEXT: rts
244250
%bf.lshr = lshr i32 %bf.load, 16
245251
%cmp2 = icmp eq i32 %bf.lshr, 0
@@ -288,20 +294,24 @@ define void @test20(i32 %bf.load, i8 %x1, ptr %b_addr) {
288294
; CHECK-NEXT: ; %bb.0:
289295
; CHECK-NEXT: suba.l #4, %sp
290296
; CHECK-NEXT: .cfi_def_cfa_offset -8
291-
; CHECK-NEXT: movem.l %d2, (0,%sp) ; 8-byte Folded Spill
297+
; CHECK-NEXT: movem.l %d2, (0,%sp) ; 8-byte Folded Spill
292298
; CHECK-NEXT: move.l #16777215, %d0
293299
; CHECK-NEXT: and.l (8,%sp), %d0
294300
; CHECK-NEXT: sne %d1
295301
; CHECK-NEXT: and.l #255, %d1
296-
; CHECK-NEXT: move.l (16,%sp), %a0
302+
; CHECK-NEXT: and.l #1, %d1
297303
; CHECK-NEXT: move.b (15,%sp), %d2
298304
; CHECK-NEXT: and.l #255, %d2
299305
; CHECK-NEXT: add.l %d1, %d2
300-
; CHECK-NEXT: sne (%a0)
306+
; CHECK-NEXT: sne %d1
307+
; CHECK-NEXT: and.b #1, %d1
308+
; CHECK-NEXT: move.l (16,%sp), %a0
309+
; CHECK-NEXT: move.b %d1, (%a0)
301310
; CHECK-NEXT: cmpi.l #0, %d0
302-
; CHECK-NEXT: lea (d,%pc), %a0
303-
; CHECK-NEXT: sne (%a0)
304-
; CHECK-NEXT: movem.l (0,%sp), %d2 ; 8-byte Folded Reload
311+
; CHECK-NEXT: sne %d0
312+
; CHECK-NEXT: and.b #1, %d0
313+
; CHECK-NEXT: move.b %d0, (d,%pc)
314+
; CHECK-NEXT: movem.l (0,%sp), %d2 ; 8-byte Folded Reload
305315
; CHECK-NEXT: adda.l #4, %sp
306316
; CHECK-NEXT: rts
307317
%bf.shl = shl i32 %bf.load, 8

‎llvm/test/CodeGen/M68k/Control/non-cmov-switch.ll

Lines changed: 22 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@ define internal void @select_i32(i32 %self, ptr nonnull %value) {
1616
; CHECK-NEXT: bne .LBB0_2
1717
; CHECK-NEXT: ; %bb.1: ; %start
1818
; CHECK-NEXT: and.l #255, %d1
19+
; CHECK-NEXT: and.l #1, %d1
1920
; CHECK-NEXT: cmpi.l #0, %d1
2021
; CHECK-NEXT: bne .LBB0_3
2122
; CHECK-NEXT: .LBB0_2: ; %null
@@ -60,6 +61,7 @@ define internal void @select_i16(i16 %self, ptr nonnull %value) {
6061
; CHECK-NEXT: bne .LBB1_2
6162
; CHECK-NEXT: ; %bb.1: ; %start
6263
; CHECK-NEXT: and.l #255, %d1
64+
; CHECK-NEXT: and.w #1, %d1
6365
; CHECK-NEXT: cmpi.w #0, %d1
6466
; CHECK-NEXT: bne .LBB1_3
6567
; CHECK-NEXT: .LBB1_2: ; %null
@@ -93,18 +95,26 @@ define internal void @select_i8(i8 %self, ptr nonnull %value) {
9395
; CHECK-LABEL: select_i8:
9496
; CHECK: .cfi_startproc
9597
; CHECK-NEXT: ; %bb.0: ; %start
96-
; CHECK-NEXT: move.l (8,%sp), %d0
97-
; CHECK-NEXT: cmpi.b #0, (7,%sp)
98-
; CHECK-NEXT: sne %d1
99-
; CHECK-NEXT: bne .LBB2_2
100-
; CHECK-NEXT: ; %bb.1: ; %start
101-
; CHECK-NEXT: cmpi.b #0, %d1
102-
; CHECK-NEXT: bne .LBB2_3
103-
; CHECK-NEXT: .LBB2_2: ; %null
104-
; CHECK-NEXT: suba.l %a0, %a0
105-
; CHECK-NEXT: move.l %d0, (%a0)
106-
; CHECK-NEXT: .LBB2_3: ; %exit
107-
; CHECK-NEXT: rts
98+
; CHECK-NEXT: suba.l #4, %sp
99+
; CHECK-NEXT: .cfi_def_cfa_offset -8
100+
; CHECK-NEXT: movem.l %d2, (0,%sp) ; 8-byte Folded Spill
101+
; CHECK-NEXT: cmpi.b #0, (11,%sp)
102+
; CHECK-NEXT: move.w %ccr, %d2
103+
; CHECK-NEXT: sne %d1
104+
; CHECK-NEXT: move.l (12,%sp), %d0
105+
; CHECK-NEXT: move.w %d2, %ccr
106+
; CHECK-NEXT: bne .LBB2_2
107+
; CHECK-NEXT: ; %bb.1: ; %start
108+
; CHECK-NEXT: and.b #1, %d1
109+
; CHECK-NEXT: cmpi.b #0, %d1
110+
; CHECK-NEXT: bne .LBB2_3
111+
; CHECK-NEXT: .LBB2_2: ; %null
112+
; CHECK-NEXT: suba.l %a0, %a0
113+
; CHECK-NEXT: move.l %d0, (%a0)
114+
; CHECK-NEXT: .LBB2_3: ; %exit
115+
; CHECK-NEXT: movem.l (0,%sp), %d2 ; 8-byte Folded Reload
116+
; CHECK-NEXT: adda.l #4, %sp
117+
; CHECK-NEXT: rts
108118
start:
109119
%2 = icmp eq i8 %self, 0
110120
%3 = select i1 %2, i8 0, i8 1

‎llvm/test/CodeGen/M68k/Control/setcc.ll

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@ define zeroext i16 @t1(i16 zeroext %x) nounwind readnone ssp {
1111
; CHECK-NEXT: sub.l #26, %d0
1212
; CHECK-NEXT: shi %d0
1313
; CHECK-NEXT: and.l #255, %d0
14+
; CHECK-NEXT: and.l #1, %d0
1415
; CHECK-NEXT: lsl.l #5, %d0
1516
; CHECK-NEXT: rts
1617
entry:
@@ -27,6 +28,7 @@ define zeroext i16 @t2(i16 zeroext %x) nounwind readnone ssp {
2728
; CHECK-NEXT: sub.l #26, %d0
2829
; CHECK-NEXT: scs %d0
2930
; CHECK-NEXT: and.l #255, %d0
31+
; CHECK-NEXT: and.l #1, %d0
3032
; CHECK-NEXT: lsl.l #5, %d0
3133
; CHECK-NEXT: rts
3234
entry:
@@ -39,16 +41,17 @@ define fastcc i64 @t3(i64 %x) nounwind readnone ssp {
3941
; CHECK-LABEL: t3:
4042
; CHECK: ; %bb.0: ; %entry
4143
; CHECK-NEXT: suba.l #4, %sp
42-
; CHECK-NEXT: movem.l %d2, (0,%sp) ; 8-byte Folded Spill
44+
; CHECK-NEXT: movem.l %d2, (0,%sp) ; 8-byte Folded Spill
4345
; CHECK-NEXT: moveq #0, %d2
4446
; CHECK-NEXT: sub.l #18, %d1
4547
; CHECK-NEXT: subx.l %d2, %d0
4648
; CHECK-NEXT: scs %d0
4749
; CHECK-NEXT: move.l %d0, %d1
4850
; CHECK-NEXT: and.l #255, %d1
51+
; CHECK-NEXT: and.l #1, %d1
4952
; CHECK-NEXT: lsl.l #6, %d1
5053
; CHECK-NEXT: move.l %d2, %d0
51-
; CHECK-NEXT: movem.l (0,%sp), %d2 ; 8-byte Folded Reload
54+
; CHECK-NEXT: movem.l (0,%sp), %d2 ; 8-byte Folded Reload
5255
; CHECK-NEXT: adda.l #4, %sp
5356
; CHECK-NEXT: rts
5457
entry:

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