Skip to content

Commit 36089b0

Browse files
committed
Machine-Level Implementation
1 parent 7a10c5e commit 36089b0

File tree

3 files changed

+15
-0
lines changed

3 files changed

+15
-0
lines changed

llvm/lib/Target/AMDGPU/AMDGPU.h

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -39,6 +39,7 @@ FunctionPass *createSIAnnotateControlFlowLegacyPass();
3939
FunctionPass *createSIFoldOperandsLegacyPass();
4040
FunctionPass *createSIPeepholeSDWALegacyPass();
4141
FunctionPass *createSILowerI1CopiesLegacyPass();
42+
FunctionPass *createSISAbs16FixupLegacyPass();
4243
FunctionPass *createSIShrinkInstructionsLegacyPass();
4344
FunctionPass *createSILoadStoreOptimizerLegacyPass();
4445
FunctionPass *createSIWholeQuadModeLegacyPass();
@@ -93,6 +94,13 @@ class SILowerI1CopiesPass : public PassInfoMixin<SILowerI1CopiesPass> {
9394
MachineFunctionAnalysisManager &MFAM);
9495
};
9596

97+
class SISAbs16FixupPass : public PassInfoMixin<SISAbs16FixupPass> {
98+
public:
99+
SISAbs16FixupPass() = default;
100+
PreservedAnalyses run(MachineFunction &MF,
101+
MachineFunctionAnalysisManager &MFAM);
102+
};
103+
96104
void initializeAMDGPUDAGToDAGISelLegacyPass(PassRegistry &);
97105

98106
void initializeAMDGPUAlwaysInlinePass(PassRegistry&);
@@ -197,6 +205,9 @@ extern char &SILowerWWMCopiesLegacyID;
197205
void initializeSILowerI1CopiesLegacyPass(PassRegistry &);
198206
extern char &SILowerI1CopiesLegacyID;
199207

208+
void initializeSISAbs16FixupLegacyPass(PassRegistry &);
209+
extern char &SISAbs16FixupLegacyID;
210+
200211
void initializeAMDGPUGlobalISelDivergenceLoweringPass(PassRegistry &);
201212
extern char &AMDGPUGlobalISelDivergenceLoweringID;
202213

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -551,6 +551,7 @@ extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() {
551551
initializeAMDGPUPrepareAGPRAllocLegacyPass(*PR);
552552
initializeGCNDPPCombineLegacyPass(*PR);
553553
initializeSILowerI1CopiesLegacyPass(*PR);
554+
initializeSISAbs16FixupLegacyPass(*PR);
554555
initializeAMDGPUGlobalISelDivergenceLoweringPass(*PR);
555556
initializeAMDGPURegBankSelectPass(*PR);
556557
initializeAMDGPURegBankLegalizePass(*PR);
@@ -1521,6 +1522,7 @@ bool GCNPassConfig::addInstSelector() {
15211522
AMDGPUPassConfig::addInstSelector();
15221523
addPass(&SIFixSGPRCopiesLegacyID);
15231524
addPass(createSILowerI1CopiesLegacyPass());
1525+
addPass(createSISAbs16FixupLegacyPass());
15241526
return false;
15251527
}
15261528

@@ -2215,6 +2217,7 @@ Error AMDGPUCodeGenPassBuilder::addInstSelector(AddMachinePass &addPass) const {
22152217
addPass(AMDGPUISelDAGToDAGPass(TM));
22162218
addPass(SIFixSGPRCopiesPass());
22172219
addPass(SILowerI1CopiesPass());
2220+
addPass(SISAbs16FixupPass());
22182221
return Error::success();
22192222
}
22202223

llvm/lib/Target/AMDGPU/CMakeLists.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -185,6 +185,7 @@ add_llvm_target(AMDGPUCodeGen
185185
SIPreEmitPeephole.cpp
186186
SIProgramInfo.cpp
187187
SIRegisterInfo.cpp
188+
SISAbs16Fixup.cpp
188189
SIShrinkInstructions.cpp
189190
SIWholeQuadMode.cpp
190191

0 commit comments

Comments
 (0)