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[LoongArch] Pre-commit tests for [x]vldi instructions with special constant splats
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+258
-28
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2 files changed

+258
-28
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‎llvm/test/CodeGen/LoongArch/lasx/build-vector.ll‎

Lines changed: 129 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -197,8 +197,9 @@ entry:
197197
ret void
198198
}
199199

200-
define void @buildvector_v2f32_const_splat(ptr %dst) nounwind {
201-
; CHECK-LABEL: buildvector_v2f32_const_splat:
200+
;; Also check buildvector_const_splat_xvldi_1010.
201+
define void @buildvector_v8f32_const_splat(ptr %dst) nounwind {
202+
; CHECK-LABEL: buildvector_v8f32_const_splat:
202203
; CHECK: # %bb.0: # %entry
203204
; CHECK-NEXT: lu12i.w $a1, 260096
204205
; CHECK-NEXT: xvreplgr2vr.w $xr0, $a1
@@ -209,6 +210,7 @@ entry:
209210
ret void
210211
}
211212

213+
;; Also check buildvector_const_splat_xvldi_1100.
212214
define void @buildvector_v4f64_const_splat(ptr %dst) nounwind {
213215
; LA32-LABEL: buildvector_v4f64_const_splat:
214216
; LA32: # %bb.0: # %entry
@@ -228,11 +230,124 @@ entry:
228230
ret void
229231
}
230232

233+
;; imm[11:8] == 4'b0000/4'b0100/4'b1000 can be represented using xvrepli.[whb].
234+
define void @buildvector_const_splat_xvldi_0001(ptr %dst) nounwind {
235+
; CHECK-LABEL: buildvector_const_splat_xvldi_0001:
236+
; CHECK: # %bb.0: # %entry
237+
; CHECK-NEXT: ori $a1, $zero, 768
238+
; CHECK-NEXT: xvreplgr2vr.w $xr0, $a1
239+
; CHECK-NEXT: xvst $xr0, $a0, 0
240+
; CHECK-NEXT: ret
241+
entry:
242+
store <8 x i32> <i32 768, i32 768, i32 768, i32 768, i32 768, i32 768, i32 768, i32 768>, ptr %dst
243+
ret void
244+
}
245+
246+
define void @buildvector_const_splat_xvldi_0010(ptr %dst) nounwind {
247+
; CHECK-LABEL: buildvector_const_splat_xvldi_0010:
248+
; CHECK: # %bb.0: # %entry
249+
; CHECK-NEXT: lu12i.w $a1, 16
250+
; CHECK-NEXT: xvreplgr2vr.w $xr0, $a1
251+
; CHECK-NEXT: xvst $xr0, $a0, 0
252+
; CHECK-NEXT: ret
253+
entry:
254+
store <8 x i32> <i32 65536, i32 65536, i32 65536, i32 65536, i32 65536, i32 65536, i32 65536, i32 65536>, ptr %dst
255+
ret void
256+
}
257+
258+
define void @buildvector_const_splat_xvldi_0011(ptr %dst) nounwind {
259+
; CHECK-LABEL: buildvector_const_splat_xvldi_0011:
260+
; CHECK: # %bb.0: # %entry
261+
; CHECK-NEXT: lu12i.w $a1, 4096
262+
; CHECK-NEXT: xvreplgr2vr.w $xr0, $a1
263+
; CHECK-NEXT: xvst $xr0, $a0, 0
264+
; CHECK-NEXT: ret
265+
entry:
266+
store <8 x i32> <i32 16777216, i32 16777216, i32 16777216, i32 16777216, i32 16777216, i32 16777216, i32 16777216, i32 16777216>, ptr %dst
267+
ret void
268+
}
269+
270+
define void @buildvector_const_splat_xvldi_0101(ptr %dst) {
271+
; CHECK-LABEL: buildvector_const_splat_xvldi_0101:
272+
; CHECK: # %bb.0: # %entry
273+
; CHECK-NEXT: ori $a1, $zero, 768
274+
; CHECK-NEXT: xvreplgr2vr.h $xr0, $a1
275+
; CHECK-NEXT: xvst $xr0, $a0, 0
276+
; CHECK-NEXT: ret
277+
entry:
278+
store <16 x i16> <i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768>, ptr %dst
279+
ret void
280+
}
281+
282+
define void @buildvector_const_splat_xvldi_0110(ptr %dst) nounwind {
283+
; CHECK-LABEL: buildvector_const_splat_xvldi_0110:
284+
; CHECK: # %bb.0: # %entry
285+
; CHECK-NEXT: ori $a1, $zero, 1023
286+
; CHECK-NEXT: xvreplgr2vr.w $xr0, $a1
287+
; CHECK-NEXT: xvst $xr0, $a0, 0
288+
; CHECK-NEXT: ret
289+
entry:
290+
store <8 x i32> <i32 1023, i32 1023, i32 1023, i32 1023, i32 1023, i32 1023, i32 1023, i32 1023>, ptr %dst
291+
ret void
292+
}
293+
294+
define void @buildvector_const_splat_xvldi_0111(ptr %dst) nounwind {
295+
; CHECK-LABEL: buildvector_const_splat_xvldi_0111:
296+
; CHECK: # %bb.0: # %entry
297+
; CHECK-NEXT: lu12i.w $a1, 15
298+
; CHECK-NEXT: ori $a1, $a1, 4095
299+
; CHECK-NEXT: xvreplgr2vr.w $xr0, $a1
300+
; CHECK-NEXT: xvst $xr0, $a0, 0
301+
; CHECK-NEXT: ret
302+
entry:
303+
store <8 x i32> <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>, ptr %dst
304+
ret void
305+
}
306+
307+
define void @buildvector_const_splat_xvldi_1001(ptr %dst) nounwind {
308+
; LA32-LABEL: buildvector_const_splat_xvldi_1001:
309+
; LA32: # %bb.0: # %entry
310+
; LA32-NEXT: pcalau12i $a1, %pc_hi20(.LCPI21_0)
311+
; LA32-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI21_0)
312+
; LA32-NEXT: xvst $xr0, $a0, 0
313+
; LA32-NEXT: ret
314+
;
315+
; LA64-LABEL: buildvector_const_splat_xvldi_1001:
316+
; LA64: # %bb.0: # %entry
317+
; LA64-NEXT: lu12i.w $a1, 15
318+
; LA64-NEXT: ori $a1, $a1, 4095
319+
; LA64-NEXT: xvreplgr2vr.d $xr0, $a1
320+
; LA64-NEXT: xvst $xr0, $a0, 0
321+
; LA64-NEXT: ret
322+
entry:
323+
store <8 x i32> <i32 65535, i32 0, i32 65535, i32 0, i32 65535, i32 0, i32 65535, i32 0>, ptr %dst
324+
ret void
325+
}
326+
327+
define void @buildvector_const_splat_xvldi_1011(ptr %dst) nounwind {
328+
; LA32-LABEL: buildvector_const_splat_xvldi_1011:
329+
; LA32: # %bb.0: # %entry
330+
; LA32-NEXT: pcalau12i $a1, %pc_hi20(.LCPI22_0)
331+
; LA32-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI22_0)
332+
; LA32-NEXT: xvst $xr0, $a0, 0
333+
; LA32-NEXT: ret
334+
;
335+
; LA64-LABEL: buildvector_const_splat_xvldi_1011:
336+
; LA64: # %bb.0: # %entry
337+
; LA64-NEXT: lu12i.w $a1, 262144
338+
; LA64-NEXT: xvreplgr2vr.d $xr0, $a1
339+
; LA64-NEXT: xvst $xr0, $a0, 0
340+
; LA64-NEXT: ret
341+
entry:
342+
store <8 x float> <float 2.0, float 0.0, float 2.0, float 0.0, float 2.0, float 0.0, float 2.0, float 0.0>, ptr %dst
343+
ret void
344+
}
345+
231346
define void @buildvector_v32i8_const(ptr %dst) nounwind {
232347
; CHECK-LABEL: buildvector_v32i8_const:
233348
; CHECK: # %bb.0: # %entry
234-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI15_0)
235-
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI15_0)
349+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI23_0)
350+
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI23_0)
236351
; CHECK-NEXT: xvst $xr0, $a0, 0
237352
; CHECK-NEXT: ret
238353
entry:
@@ -243,8 +358,8 @@ entry:
243358
define void @buildvector_v16i16_const(ptr %dst) nounwind {
244359
; CHECK-LABEL: buildvector_v16i16_const:
245360
; CHECK: # %bb.0: # %entry
246-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI16_0)
247-
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI16_0)
361+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI24_0)
362+
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI24_0)
248363
; CHECK-NEXT: xvst $xr0, $a0, 0
249364
; CHECK-NEXT: ret
250365
entry:
@@ -255,8 +370,8 @@ entry:
255370
define void @buildvector_v8i32_const(ptr %dst) nounwind {
256371
; CHECK-LABEL: buildvector_v8i32_const:
257372
; CHECK: # %bb.0: # %entry
258-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI17_0)
259-
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI17_0)
373+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI25_0)
374+
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI25_0)
260375
; CHECK-NEXT: xvst $xr0, $a0, 0
261376
; CHECK-NEXT: ret
262377
entry:
@@ -267,8 +382,8 @@ entry:
267382
define void @buildvector_v4i64_const(ptr %dst) nounwind {
268383
; CHECK-LABEL: buildvector_v4i64_const:
269384
; CHECK: # %bb.0: # %entry
270-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI18_0)
271-
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI18_0)
385+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI26_0)
386+
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI26_0)
272387
; CHECK-NEXT: xvst $xr0, $a0, 0
273388
; CHECK-NEXT: ret
274389
entry:
@@ -279,8 +394,8 @@ entry:
279394
define void @buildvector_v2f32_const(ptr %dst) nounwind {
280395
; CHECK-LABEL: buildvector_v2f32_const:
281396
; CHECK: # %bb.0: # %entry
282-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI19_0)
283-
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI19_0)
397+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI27_0)
398+
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI27_0)
284399
; CHECK-NEXT: xvst $xr0, $a0, 0
285400
; CHECK-NEXT: ret
286401
entry:
@@ -291,8 +406,8 @@ entry:
291406
define void @buildvector_v4f64_const(ptr %dst) nounwind {
292407
; CHECK-LABEL: buildvector_v4f64_const:
293408
; CHECK: # %bb.0: # %entry
294-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI20_0)
295-
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI20_0)
409+
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI28_0)
410+
; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI28_0)
296411
; CHECK-NEXT: xvst $xr0, $a0, 0
297412
; CHECK-NEXT: ret
298413
entry:

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