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1 parent b0ad9c2 commit 36dc2a9Copy full SHA for 36dc2a9
llvm/lib/Target/RISCV/RISCVInstrInfoZalasr.td
@@ -26,7 +26,7 @@ class LAQ_r<bit aq, bit rl, bits<3> funct3, string opcodestr>
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let hasSideEffects = 0, mayLoad = 0, mayStore = 1 in
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class SRL_r<bit aq, bit rl, bits<3> funct3, string opcodestr>
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: RVInstRAtomic<0b00111, aq, rl, funct3, OPC_AMO,
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- (outs ), (ins GPRMemZeroOffset:$rs1, GPR:$rs2),
+ (outs), (ins GPR:$rs2, GPRMemZeroOffset:$rs1),
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opcodestr, "$rs2, $rs1"> {
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let rd = 0;
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}
@@ -71,7 +71,7 @@ class PatLAQ<SDPatternOperator OpNode, RVInst Inst, ValueType vt = XLenVT>
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// while atomic_store has data, addr
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class PatSRL<SDPatternOperator OpNode, RVInst Inst, ValueType vt = XLenVT>
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: Pat<(OpNode (vt GPR:$rs2), (XLenVT GPRMemZeroOffset:$rs1)),
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- (Inst GPRMemZeroOffset:$rs1, GPR:$rs2)>;
+ (Inst GPR:$rs2, GPRMemZeroOffset:$rs1)>;
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let Predicates = [HasStdExtZalasr] in {
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