Skip to content

Commit 36ee902

Browse files
T0b1-iOST0b1-iOS
committed
[Clang][CodeGen][X86] don't coerce int128 into {i64,i64} for SysV-like ABIs
1 parent 7a3e555 commit 36ee902

File tree

6 files changed

+70
-57
lines changed

6 files changed

+70
-57
lines changed

‎clang/lib/CodeGen/Targets/X86.cpp‎

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2594,6 +2594,14 @@ GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi,
25942594

25952595
ABIArgInfo X86_64ABIInfo::
25962596
classifyReturnType(QualType RetTy) const {
2597+
// return int128 as i128
2598+
if (const BuiltinType *BT = RetTy->getAs<BuiltinType>()) {
2599+
BuiltinType::Kind k = BT->getKind();
2600+
if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) {
2601+
return ABIArgInfo::getDirect();
2602+
}
2603+
}
2604+
25972605
// AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the
25982606
// classification algorithm.
25992607
X86_64ABIInfo::Class Lo, Hi;
@@ -2726,6 +2734,16 @@ X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned freeIntRegs,
27262734
bool isNamedArg, bool IsRegCall) const {
27272735
Ty = useFirstFieldIfTransparentUnion(Ty);
27282736

2737+
// represent int128 as i128
2738+
if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
2739+
BuiltinType::Kind k = BT->getKind();
2740+
if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) {
2741+
neededInt = 2;
2742+
neededSSE = 0;
2743+
return ABIArgInfo::getDirect();
2744+
}
2745+
}
2746+
27292747
X86_64ABIInfo::Class Lo, Hi;
27302748
classify(Ty, 0, Lo, Hi, isNamedArg, IsRegCall);
27312749

‎clang/test/CodeGen/X86/i128-debuginfo.c‎

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,10 @@
1+
// no autogeneration since update_cc_test_checks does not support -g
2+
// RUN: %clang_cc1 -triple x86_64-pc-linux -O1 -debug-info-kind=limited -emit-llvm -o - %s | FileCheck %s
3+
4+
// CHECK-LABEL: define{{.*}} i128 @add(i128 noundef %a)
5+
// CHECK: #dbg_value(i128 %a, ![[DI:.*]], !DIExpression()
6+
__int128_t add(__int128_t a) {
7+
return a + a;
8+
}
9+
10+
// CHECK: ![[DI]] = !DILocalVariable(name: "a", arg: 1

‎clang/test/CodeGen/X86/x86_64-arguments.c‎

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -551,6 +551,27 @@ struct s68 {
551551
void f68(struct s68 x) {
552552
}
553553

554+
// CHECK-LABEL: define{{.*}} i128 @f69(i128 noundef %a)
555+
__int128_t f69(__int128_t a) {
556+
return a;
557+
}
558+
559+
// CHECK-LABEL: define{{.*}} i128 @f70(i128 noundef %a)
560+
__uint128_t f70(__uint128_t a) {
561+
return a;
562+
}
563+
564+
// check that registers are correctly counted for (u)int128_t arguments
565+
struct s71 {
566+
long long a, b;
567+
};
568+
// CHECK-LABEL: define{{.*}} void @f71(i128 noundef %a, i128 noundef %b, i64 noundef %c, ptr noundef byval(%struct.s71) align 8 %d)
569+
void f71(__int128_t a, __int128_t b, long long c, struct s71 d) {
570+
}
571+
// CHECK-LABEL: define{{.*}} void @f72(i128 noundef %a, i128 noundef %b, i64 %d.coerce0, i64 %d.coerce1)
572+
void f72(__int128_t a, __int128_t b, struct s71 d) {
573+
}
574+
554575
/// The synthesized __va_list_tag does not have file/line fields.
555576
// CHECK: = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "__va_list_tag",
556577
// CHECK-NOT: file:

‎clang/test/CodeGen/alloc-align-attr.c‎

Lines changed: 17 additions & 41 deletions
Original file line numberDiff line numberDiff line change
@@ -70,66 +70,42 @@ __INT32_TYPE__ test4(__SIZE_TYPE__ a) {
7070

7171
struct Empty {};
7272
struct MultiArgs { __INT64_TYPE__ a, b;};
73-
// Struct parameter doesn't take up an IR parameter, 'i' takes up 2.
73+
// Struct parameter doesn't take up an IR parameter, 'i' takes up 1.
7474
// Truncation to i64 is permissible, since alignments of greater than 2^64 are insane.
7575
__INT32_TYPE__ *m3(struct Empty s, __int128_t i) __attribute__((alloc_align(2)));
7676
// CHECK-LABEL: @test5(
7777
// CHECK-NEXT: entry:
78-
// CHECK-NEXT: [[A:%.*]] = alloca i128, align 16
7978
// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i128, align 16
8079
// CHECK-NEXT: [[E:%.*]] = alloca [[STRUCT_EMPTY:%.*]], align 1
81-
// CHECK-NEXT: [[COERCE:%.*]] = alloca i128, align 16
82-
// CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[A]], i32 0, i32 0
83-
// CHECK-NEXT: store i64 [[A_COERCE0:%.*]], ptr [[TMP0]], align 16
84-
// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[A]], i32 0, i32 1
85-
// CHECK-NEXT: store i64 [[A_COERCE1:%.*]], ptr [[TMP1]], align 8
86-
// CHECK-NEXT: [[A1:%.*]] = load i128, ptr [[A]], align 16
87-
// CHECK-NEXT: store i128 [[A1]], ptr [[A_ADDR]], align 16
88-
// CHECK-NEXT: [[TMP2:%.*]] = load i128, ptr [[A_ADDR]], align 16
89-
// CHECK-NEXT: store i128 [[TMP2]], ptr [[COERCE]], align 16
90-
// CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[COERCE]], i32 0, i32 0
91-
// CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 16
92-
// CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[COERCE]], i32 0, i32 1
93-
// CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 8
94-
// CHECK-NEXT: [[CALL:%.*]] = call ptr @m3(i64 noundef [[TMP4]], i64 noundef [[TMP6]])
95-
// CHECK-NEXT: [[CASTED_ALIGN:%.*]] = trunc i128 [[TMP2]] to i64
80+
// CHECK-NEXT: store i128 [[A:%.*]], ptr [[A_ADDR]], align 16
81+
// CHECK-NEXT: [[TMP0:%.*]] = load i128, ptr [[A_ADDR]], align 16
82+
// CHECK-NEXT: [[CALL:%.*]] = call ptr @m3(i128 noundef [[TMP0]])
83+
// CHECK-NEXT: [[CASTED_ALIGN:%.*]] = trunc i128 [[TMP0]] to i64
9684
// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[CALL]], i64 [[CASTED_ALIGN]]) ]
97-
// CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[CALL]], align 4
98-
// CHECK-NEXT: ret i32 [[TMP7]]
85+
// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[CALL]], align 4
86+
// CHECK-NEXT: ret i32 [[TMP1]]
9987
//
10088
__INT32_TYPE__ test5(__int128_t a) {
10189
struct Empty e;
10290
return *m3(e, a);
10391
}
104-
// Struct parameter takes up 2 parameters, 'i' takes up 2.
92+
// Struct parameter takes up 2 parameters, 'i' takes up 1.
10593
__INT32_TYPE__ *m4(struct MultiArgs s, __int128_t i) __attribute__((alloc_align(2)));
10694
// CHECK-LABEL: @test6(
10795
// CHECK-NEXT: entry:
108-
// CHECK-NEXT: [[A:%.*]] = alloca i128, align 16
10996
// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i128, align 16
11097
// CHECK-NEXT: [[E:%.*]] = alloca [[STRUCT_MULTIARGS:%.*]], align 8
111-
// CHECK-NEXT: [[COERCE:%.*]] = alloca i128, align 16
112-
// CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[A]], i32 0, i32 0
113-
// CHECK-NEXT: store i64 [[A_COERCE0:%.*]], ptr [[TMP0]], align 16
114-
// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[A]], i32 0, i32 1
115-
// CHECK-NEXT: store i64 [[A_COERCE1:%.*]], ptr [[TMP1]], align 8
116-
// CHECK-NEXT: [[A1:%.*]] = load i128, ptr [[A]], align 16
117-
// CHECK-NEXT: store i128 [[A1]], ptr [[A_ADDR]], align 16
118-
// CHECK-NEXT: [[TMP2:%.*]] = load i128, ptr [[A_ADDR]], align 16
119-
// CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[E]], i32 0, i32 0
98+
// CHECK-NEXT: store i128 [[A:%.*]], ptr [[A_ADDR]], align 16
99+
// CHECK-NEXT: [[TMP0:%.*]] = load i128, ptr [[A_ADDR]], align 16
100+
// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[E]], i32 0, i32 0
101+
// CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
102+
// CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[E]], i32 0, i32 1
120103
// CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr [[TMP3]], align 8
121-
// CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[E]], i32 0, i32 1
122-
// CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP5]], align 8
123-
// CHECK-NEXT: store i128 [[TMP2]], ptr [[COERCE]], align 16
124-
// CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[COERCE]], i32 0, i32 0
125-
// CHECK-NEXT: [[TMP8:%.*]] = load i64, ptr [[TMP7]], align 16
126-
// CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[COERCE]], i32 0, i32 1
127-
// CHECK-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8
128-
// CHECK-NEXT: [[CALL:%.*]] = call ptr @m4(i64 [[TMP4]], i64 [[TMP6]], i64 noundef [[TMP8]], i64 noundef [[TMP10]])
129-
// CHECK-NEXT: [[CASTED_ALIGN:%.*]] = trunc i128 [[TMP2]] to i64
104+
// CHECK-NEXT: [[CALL:%.*]] = call ptr @m4(i64 [[TMP2]], i64 [[TMP4]], i128 noundef [[TMP0]])
105+
// CHECK-NEXT: [[CASTED_ALIGN:%.*]] = trunc i128 [[TMP0]] to i64
130106
// CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[CALL]], i64 [[CASTED_ALIGN]]) ]
131-
// CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[CALL]], align 4
132-
// CHECK-NEXT: ret i32 [[TMP11]]
107+
// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[CALL]], align 4
108+
// CHECK-NEXT: ret i32 [[TMP5]]
133109
//
134110
__INT32_TYPE__ test6(__int128_t a) {
135111
struct MultiArgs e;

‎clang/test/CodeGen/builtins.c‎

Lines changed: 3 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -956,36 +956,24 @@ void test_builtin_os_log_errno(void) {
956956
void test_builtin_os_log_long_double(void *buf, long double ld) {
957957
// CHECK: %[[BUF_ADDR:.*]] = alloca ptr, align 8
958958
// CHECK: %[[LD_ADDR:.*]] = alloca x86_fp80, align 16
959-
// CHECK: %[[COERCE:.*]] = alloca i128, align 16
960959
// CHECK: store ptr %[[BUF]], ptr %[[BUF_ADDR]], align 8
961960
// CHECK: store x86_fp80 %[[LD]], ptr %[[LD_ADDR]], align 16
962961
// CHECK: %[[V0:.*]] = load ptr, ptr %[[BUF_ADDR]], align 8
963962
// CHECK: %[[V1:.*]] = load x86_fp80, ptr %[[LD_ADDR]], align 16
964963
// CHECK: %[[V2:.*]] = bitcast x86_fp80 %[[V1]] to i80
965964
// CHECK: %[[V3:.*]] = zext i80 %[[V2]] to i128
966-
// CHECK: store i128 %[[V3]], ptr %[[COERCE]], align 16
967-
// CHECK: %[[V5:.*]] = getelementptr inbounds nuw { i64, i64 }, ptr %[[COERCE]], i32 0, i32 0
968-
// CHECK: %[[V6:.*]] = load i64, ptr %[[V5]], align 16
969-
// CHECK: %[[V7:.*]] = getelementptr inbounds nuw { i64, i64 }, ptr %[[COERCE]], i32 0, i32 1
970-
// CHECK: %[[V8:.*]] = load i64, ptr %[[V7]], align 8
971-
// CHECK: call void @__os_log_helper_1_0_1_16_0(ptr noundef %[[V0]], i64 noundef %[[V6]], i64 noundef %[[V8]])
965+
// CHECK: call void @__os_log_helper_1_0_1_16_0(ptr noundef %[[V0]], i128 noundef %[[V3]])
972966

973967
__builtin_os_log_format(buf, "%Lf", ld);
974968
}
975969

976970
// CHECK-LABEL: define linkonce_odr hidden void @__os_log_helper_1_0_1_16_0
977-
// CHECK: (ptr noundef %[[BUFFER:.*]], i64 noundef %[[ARG0_COERCE0:.*]], i64 noundef %[[ARG0_COERCE1:.*]])
971+
// CHECK: (ptr noundef %[[BUFFER:.*]], i128 noundef %[[ARG0:.*]])
978972

979-
// CHECK: %[[ARG0:.*]] = alloca i128, align 16
980973
// CHECK: %[[BUFFER_ADDR:.*]] = alloca ptr, align 8
981974
// CHECK: %[[ARG0_ADDR:.*]] = alloca i128, align 16
982-
// CHECK: %[[V1:.*]] = getelementptr inbounds nuw { i64, i64 }, ptr %[[ARG0]], i32 0, i32 0
983-
// CHECK: store i64 %[[ARG0_COERCE0]], ptr %[[V1]], align 16
984-
// CHECK: %[[V2:.*]] = getelementptr inbounds nuw { i64, i64 }, ptr %[[ARG0]], i32 0, i32 1
985-
// CHECK: store i64 %[[ARG0_COERCE1]], ptr %[[V2]], align 8
986-
// CHECK: %[[ARG01:.*]] = load i128, ptr %[[ARG0]], align 16
987975
// CHECK: store ptr %[[BUFFER]], ptr %[[BUFFER_ADDR]], align 8
988-
// CHECK: store i128 %[[ARG01]], ptr %[[ARG0_ADDR]], align 16
976+
// CHECK: store i128 %[[ARG0]], ptr %[[ARG0_ADDR]], align 16
989977
// CHECK: %[[BUF:.*]] = load ptr, ptr %[[BUFFER_ADDR]], align 8
990978
// CHECK: %[[SUMMARY:.*]] = getelementptr i8, ptr %[[BUF]], i64 0
991979
// CHECK: store i8 0, ptr %[[SUMMARY]], align 1

‎clang/test/CodeGen/extend-arg-64.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -84,7 +84,7 @@ int test(void) {
8484
#ifdef D128
8585
knr(i128);
8686
// CHECKEXT: load i128
87-
// CHECKEXT: call{{.*}} void (i64, i64, ...) @knr
87+
// CHECKEXT: call{{.*}} void (i128, ...) @knr
8888
#endif
8989

9090
knr(u32, s32, u16, s16, u8, s8);

0 commit comments

Comments
 (0)