[BOLT] Fixed createLoadImmediate when Imm=0

Author: rcorcs

bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp

@@ -2174,24 +2174,34 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
   InstructionListType createLoadImmediate(const MCPhysReg Dest,
                                           uint64_t Imm) const override {
     InstructionListType Insts;
-    for (int I = 0, Shift = 0; I < 4; I++, Shift += 16) {
-      uint16_t HalfWord = (Imm >> Shift) & 0xFFFF;
-      if (!HalfWord)
-        continue;
+    if (Imm == 0) {
       MCInst Inst;
-      if (Insts.size() == 0) {
-        Inst.setOpcode(AArch64::MOVZXi);
-        Inst.addOperand(MCOperand::createReg(Dest));
-        Inst.addOperand(MCOperand::createImm(HalfWord));
-        Inst.addOperand(MCOperand::createImm(Shift));
-        Insts.push_back(Inst);
-      } else {
-        Inst.setOpcode(AArch64::MOVKXi);
-        Inst.addOperand(MCOperand::createReg(Dest));
-        Inst.addOperand(MCOperand::createReg(Dest));
-        Inst.addOperand(MCOperand::createImm(HalfWord));
-        Inst.addOperand(MCOperand::createImm(Shift));
-        Insts.push_back(Inst);
+      Inst.setOpcode(AArch64::ORRXrs);
+      Inst.addOperand(MCOperand::createReg(Dest));
+      Inst.addOperand(MCOperand::createReg(AArch64::XZR));
+      Inst.addOperand(MCOperand::createReg(AArch64::XZR));
+      Inst.addOperand(MCOperand::createImm(0));
+      Insts.push_back(Inst);
+    } else {
+      for (int I = 0, Shift = 0; I < 4; I++, Shift += 16) {
+        uint16_t HalfWord = (Imm >> Shift) & 0xFFFF;
+        if (!HalfWord)
+          continue;
+        MCInst Inst;
+        if (Insts.size() == 0) {
+          Inst.setOpcode(AArch64::MOVZXi);
+          Inst.addOperand(MCOperand::createReg(Dest));
+          Inst.addOperand(MCOperand::createImm(HalfWord));
+          Inst.addOperand(MCOperand::createImm(Shift));
+          Insts.push_back(Inst);
+        } else {
+          Inst.setOpcode(AArch64::MOVKXi);
+          Inst.addOperand(MCOperand::createReg(Dest));
+          Inst.addOperand(MCOperand::createReg(Dest));
+          Inst.addOperand(MCOperand::createImm(HalfWord));
+          Inst.addOperand(MCOperand::createImm(Shift));
+          Insts.push_back(Inst);
+        }
       }
     }
     return Insts;

bolt/unittests/Core/MCPlusBuilder.cpp

@@ -167,7 +167,26 @@ TEST_P(MCPlusBuilderTester, AArch64_CmpJNE) {
   ASSERT_EQ(Label, BB->getLabel());
 }
 
-TEST_P(MCPlusBuilderTester, AArch64_LoadImm32) {
+TEST_P(MCPlusBuilderTester, AArch64_LoadZero) {
+  if (GetParam() != Triple::aarch64)
+    GTEST_SKIP();
+  BinaryFunction *BF = BC->createInjectedBinaryFunction("BF", true);
+  std::unique_ptr<BinaryBasicBlock> BB = BF->createBasicBlock();
+
+  InstructionListType Instrs = BC->MIB->createLoadImmediate(AArch64::X0, 0);
+  BB->addInstructions(Instrs.begin(), Instrs.end());
+
+  ASSERT_EQ(BB->size(), 1);
+  auto II = BB->begin();
+  // mov x0, xzr <=> orr x0, xzr, xzr, lsl #0
+  ASSERT_EQ(II->getOpcode(), AArch64::ORRXrs);
+  ASSERT_EQ(II->getOperand(0).getReg(), AArch64::X0);
+  ASSERT_EQ(II->getOperand(1).getReg(), AArch64::XZR);
+  ASSERT_EQ(II->getOperand(2).getReg(), AArch64::XZR);
+  ASSERT_EQ(II->getOperand(3).getImm(), 0);
+}
+
+TEST_P(MCPlusBuilderTester, AArch64_LoadImm16) {
   if (GetParam() != Triple::aarch64)
     GTEST_SKIP();
   BinaryFunction *BF = BC->createInjectedBinaryFunction("BF", true);