[llvm-mca][AArch64] Refactor Neoverse tests to split out common inputs (NFC) (#170324)

For many of these tests the inputs are very similiar with slight
divergences, ideally we'd have common sources where we can to avoid
subtle differences.

Changes:

- For basic tests there's a relatively large diff between V1 and all
other cores because of 24f0901 (#128892) which makes it more complete.
I've been thru the entire diff and 99% of the time V1 makes more sense,
except for a couple of small changes (might post a separate patch for).
Therefore I decided it's best to take V1-basic-instructions.s as the
common source.
- Split out FEAT_RCPC_IMMO tests from basic since N1 doesnt have this
feature.
- Split out FEAT_MTE tests. V2/V3 also have this feature but were
missing tests, so I've added them.
- Take 16-bit load/store register offset from V2/V3 (better coverage).

The NEON and SVE tests are also quite substantial and could be made
common, but there's also subtle differences that take time to go thru.

Author: c-rhodes

llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/basic-instructions.s

@@ -0,0 +1,105 @@
+irg	x0, x1
+irg	sp, x1
+irg	x0, sp
+irg	x0, x1, x2
+irg	sp, x1, x2
+addg	x0, x1, #0, #1
+addg	sp, x2, #32, #3
+addg	x0, sp, #64, #5
+addg	x3, x4, #1008, #6
+addg	x5, x6, #112, #15
+subg	x0, x1, #0, #1
+subg	sp, x2, #32, #3
+subg	x0, sp, #64, #5
+subg	x3, x4, #1008, #6
+subg	x5, x6, #112, #15
+gmi	x0, x1, x2
+gmi	x3, sp, x4
+gmi	xzr, x0, x30
+gmi	x30, x0, xzr
+subp	x0, x1, x2
+subps	x0, x1, x2
+subp	x0, sp, sp
+subps	x0, sp, sp
+subps	xzr, x0, x1
+subps	xzr, sp, sp
+stg	x0, [x1, #-4096]
+stg	x1, [x2, #4080]
+stg	x2, [sp, #16]
+stg	x3, [x1]
+stg	sp, [x1]
+stzg	x0, [x1, #-4096]
+stzg	x1, [x2, #4080]
+stzg	x2, [sp, #16]
+stzg	x3, [x1]
+stzg	sp, [x1]
+stg	x0, [x1, #-4096]!
+stg	x1, [x2, #4080]!
+stg	x2, [sp, #16]!
+stg	sp, [sp, #16]!
+stzg	x0, [x1, #-4096]!
+stzg	x1, [x2, #4080]!
+stzg	x2, [sp, #16]!
+stzg	sp, [sp, #16]!
+stg	x0, [x1], #-4096
+stg	x1, [x2], #4080
+stg	x2, [sp], #16
+stg	sp, [sp], #16
+stzg	x0, [x1], #-4096
+stzg	x1, [x2], #4080
+stzg	x2, [sp], #16
+stzg	sp, [sp], #16
+st2g	x0, [x1, #-4096]
+st2g	x1, [x2, #4080]
+st2g	x2, [sp, #16]
+st2g	x3, [x1]
+st2g	sp, [x1]
+stz2g	x0, [x1, #-4096]
+stz2g	x1, [x2, #4080]
+stz2g	x2, [sp, #16]
+stz2g	x3, [x1]
+stz2g	sp, [x1]
+st2g	x0, [x1, #-4096]!
+st2g	x1, [x2, #4080]!
+st2g	x2, [sp, #16]!
+st2g	sp, [sp, #16]!
+stz2g	x0, [x1, #-4096]!
+stz2g	x1, [x2, #4080]!
+stz2g	x2, [sp, #16]!
+stz2g	sp, [sp, #16]!
+st2g	x0, [x1], #-4096
+st2g	x1, [x2], #4080
+st2g	x2, [sp], #16
+st2g	sp, [sp], #16
+stz2g	x0, [x1], #-4096
+stz2g	x1, [x2], #4080
+stz2g	x2, [sp], #16
+stz2g	sp, [sp], #16
+stgp	x0, x1, [x2, #-1024]
+stgp	x0, x1, [x2, #1008]
+stgp	x0, x1, [sp, #16]
+stgp	xzr, x1, [x2, #16]
+stgp	x0, xzr, [x2, #16]
+stgp	x0, xzr, [x2]
+stgp	x0, x1, [x2, #-1024]!
+stgp	x0, x1, [x2, #1008]!
+stgp	x0, x1, [sp, #16]!
+stgp	xzr, x1, [x2, #16]!
+stgp	x0, xzr, [x2, #16]!
+stgp	x0, x1, [x2], #-1024
+stgp	x0, x1, [x2], #1008
+stgp	x0, x1, [sp], #16
+stgp	xzr, x1, [x2], #16
+stgp	x0, xzr, [x2], #16
+ldg	x0, [x1]
+ldg	x2, [sp, #-4096]
+ldg	x3, [x4, #4080]
+ldgm	x0, [x1]
+ldgm	x1, [sp]
+ldgm	xzr, [x2]
+stgm	x0, [x1]
+stgm	x1, [sp]
+stgm	xzr, [x2]
+stzgm	x0, [x1]
+stzgm	x1, [sp]
+stzgm	xzr, [x2]

llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/mte-instructions.s

@@ -0,0 +1,17 @@
+#------------------------------------------------------------------------------
+# Load-acquire/store-release
+#------------------------------------------------------------------------------
+
+ldapur     w7, [x24]
+ldapur     x20, [x13]
+ldapurb    w13, [x17]
+ldapurh    w3, [x22]
+ldapursb   w7, [x8]
+ldapursb   x29, [x7]
+ldapursh   w17, [x19]
+ldapursh   x3, [x3]
+ldapursw   x3, [x18]
+stlur      w3, [x27]
+stlur      x23, [x25]
+stlurb     w30, [x17]
+stlurh     w9, [x29]