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Commit 390624d

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Update unit test
1 parent 584eba1 commit 390624d

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4 files changed

+12
-10
lines changed

4 files changed

+12
-10
lines changed

lldb/unittests/Disassembler/ARM/TestArm64Disassembly.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -56,8 +56,9 @@ TEST_F(TestArm64Disassembly, TestArmv81Instruction) {
5656

5757
DisassemblerSP disass_sp;
5858
Address start_addr(0x100);
59-
disass_sp = Disassembler::DisassembleBytes(arch, nullptr, nullptr, start_addr,
60-
&data, sizeof (data), num_of_instructions, false);
59+
disass_sp = Disassembler::DisassembleBytes(
60+
arch, nullptr, nullptr, nullptr, nullptr, start_addr, &data, sizeof(data),
61+
num_of_instructions, false);
6162

6263
// If we failed to get a disassembler, we can assume it is because
6364
// the llvm we linked against was not built with the ARM target,

lldb/unittests/Disassembler/ARM/TestArmv7Disassembly.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -64,8 +64,9 @@ TEST_F(TestArmv7Disassembly, TestCortexFPDisass) {
6464

6565
DisassemblerSP disass_sp;
6666
Address start_addr(0x100);
67-
disass_sp = Disassembler::DisassembleBytes(arch, nullptr, nullptr, start_addr,
68-
&data, sizeof (data), num_of_instructions, false);
67+
disass_sp = Disassembler::DisassembleBytes(
68+
arch, nullptr, nullptr, nullptr, nullptr, start_addr, &data, sizeof(data),
69+
num_of_instructions, false);
6970

7071
// If we failed to get a disassembler, we can assume it is because
7172
// the llvm we linked against was not built with the ARM target,

lldb/unittests/Disassembler/RISCV/TestMCDisasmInstanceRISCV.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -56,9 +56,9 @@ TEST_F(TestMCDisasmInstanceRISCV, TestRISCV32Instruction) {
5656

5757
DisassemblerSP disass_sp;
5858
Address start_addr(0x100);
59-
disass_sp =
60-
Disassembler::DisassembleBytes(arch, nullptr, nullptr, start_addr, &data,
61-
sizeof (data), num_of_instructions, false);
59+
disass_sp = Disassembler::DisassembleBytes(
60+
arch, nullptr, nullptr, nullptr, nullptr, start_addr, &data, sizeof(data),
61+
num_of_instructions, false);
6262

6363
// If we failed to get a disassembler, we can assume it is because
6464
// the llvm we linked against was not built with the riscv target,

lldb/unittests/Disassembler/x86/TestGetControlFlowKindx86.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -124,9 +124,9 @@ TEST_F(TestGetControlFlowKindx86, TestX86_64Instruction) {
124124

125125
DisassemblerSP disass_sp;
126126
Address start_addr(0x100);
127-
disass_sp =
128-
Disassembler::DisassembleBytes(arch, nullptr, nullptr, start_addr, &data,
129-
sizeof (data), num_of_instructions, false);
127+
disass_sp = Disassembler::DisassembleBytes(
128+
arch, nullptr, nullptr, nullptr, nullptr, start_addr, &data, sizeof(data),
129+
num_of_instructions, false);
130130

131131
// If we failed to get a disassembler, we can assume it is because
132132
// the llvm we linked against was not built with the i386 target,

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