Combine two defs into one

Author: jwanggit86

llvm/lib/Target/AMDGPU/VOP2Instructions.td

@@ -1945,7 +1945,12 @@ let AssemblerPredicate = isGFX10Only, DecoderNamespace = "GFX10" in {
     if !cast<VOP2_Pseudo>(NAME#"_e32").Pfl.HasExt32BitDPP then
     def _dpp8_gfx10 : VOP2_DPP8<op, !cast<VOP2_Pseudo>(NAME#"_e32")>;
   }
-  multiclass VOP2_Real_dpp_dpp8_gfx10<bits<6> op> :
+  multiclass VOP2Only_Real_e32_gfx10<bits<6> op> {
+    let IsSingle = 1 in
+      defm NAME: VOP2_Real_e32_gfx10<op>;
+  }
+  multiclass VOP2_Real_e32_dpp_dpp8_gfx10<bits<6> op> :
+    VOP2Only_Real_e32_gfx10<op>,
     VOP2_Real_dpp_gfx10<op>,
     VOP2_Real_dpp8_gfx10<op>;
 
@@ -2171,11 +2176,7 @@ defm V_FMAAK_F16       : VOP2Only_Real_MADK_gfx10<0x038>;
 defm V_MAX_F16         : VOP2_Real_gfx10<0x039>;
 defm V_MIN_F16         : VOP2_Real_gfx10<0x03a>;
 defm V_LDEXP_F16       : VOP2_Real_gfx10<0x03b>;
-
-let IsSingle = 1 in {
-  defm V_PK_FMAC_F16     : VOP2_Real_e32_gfx10<0x03c>;
-}
-defm V_PK_FMAC_F16     :  VOP2_Real_dpp_dpp8_gfx10<0x03c>;
+defm V_PK_FMAC_F16     : VOP2_Real_e32_dpp_dpp8_gfx10<0x03c>;
 
 // VOP2 no carry-in, carry-out.
 defm V_ADD_NC_U32 :