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Leon Clark
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[AggressiveInstCombine] Shrink loads used in shufflevector rebroadcasts.
Attempt to shrink the size of vector loads where only some of the incoming lanes are used for rebroadcasts in shufflevector instructions.
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‎llvm/test/Transforms/AggressiveInstCombine/load-shufflevector.ll

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -passes=aggressive-instcombine -S < %s | FileCheck %s
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define <8 x half> @shuffle_v4_v8f16_r0_1(ptr addrspace(1) nocapture readonly %arg0) local_unnamed_addr {
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; CHECK-LABEL: define <8 x half> @shuffle_v4_v8f16_r0_1(
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; CHECK-SAME: ptr addrspace(1) readonly captures(none) [[ARG0:%.*]]) local_unnamed_addr {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[VAL0:%.*]] = load <4 x half>, ptr addrspace(1) [[ARG0]], align 32
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x half> [[VAL0]], <4 x half> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: ret <8 x half> [[TMP1]]
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;
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entry:
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%val0 = load <4 x half>, ptr addrspace(1) %arg0, align 32
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%val1 = shufflevector <4 x half> %val0, <4 x half> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1>
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ret <8 x half> %val1
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}
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define <8 x half> @shuffle_v4_v8f16_r0_2(ptr addrspace(1) nocapture readonly %arg0) local_unnamed_addr {
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; CHECK-LABEL: define <8 x half> @shuffle_v4_v8f16_r0_2(
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; CHECK-SAME: ptr addrspace(1) readonly captures(none) [[ARG0:%.*]]) local_unnamed_addr {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[VAL0:%.*]] = load <4 x half>, ptr addrspace(1) [[ARG0]], align 32
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x half> [[VAL0]], <4 x half> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 2, i32 2, i32 2, i32 2>
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; CHECK-NEXT: ret <8 x half> [[TMP1]]
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;
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entry:
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%val0 = load <4 x half>, ptr addrspace(1) %arg0, align 32
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%val1 = shufflevector <4 x half> %val0, <4 x half> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 2, i32 2, i32 2, i32 2>
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ret <8 x half> %val1
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}
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define <4 x half> @shuffle_v4_v4f16_r1_2(ptr addrspace(1) nocapture readonly %arg0) local_unnamed_addr {
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; CHECK-LABEL: define <4 x half> @shuffle_v4_v4f16_r1_2(
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; CHECK-SAME: ptr addrspace(1) readonly captures(none) [[ARG0:%.*]]) local_unnamed_addr {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[VAL0:%.*]] = load <4 x half>, ptr addrspace(1) [[ARG0]], align 32
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x half> [[VAL0]], <4 x half> poison, <4 x i32> <i32 1, i32 1, i32 2, i32 2>
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; CHECK-NEXT: ret <4 x half> [[TMP1]]
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;
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entry:
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%val0 = load <4 x half>, ptr addrspace(1) %arg0, align 32
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%val1 = shufflevector <4 x half> %val0, <4 x half> poison, <4 x i32> <i32 1, i32 1, i32 2, i32 2>
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ret <4 x half> %val1
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}
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define <8 x half> @shuffle_v4_v8f16_r1_2(ptr addrspace(1) nocapture readonly %arg0) local_unnamed_addr {
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; CHECK-LABEL: define <8 x half> @shuffle_v4_v8f16_r1_2(
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; CHECK-SAME: ptr addrspace(1) readonly captures(none) [[ARG0:%.*]]) local_unnamed_addr {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[VAL0:%.*]] = load <4 x half>, ptr addrspace(1) [[ARG0]], align 32
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x half> [[VAL0]], <4 x half> poison, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 2, i32 2, i32 2, i32 2>
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; CHECK-NEXT: ret <8 x half> [[TMP1]]
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;
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entry:
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%val0 = load <4 x half>, ptr addrspace(1) %arg0, align 32
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%val1 = shufflevector <4 x half> %val0, <4 x half> poison, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 2, i32 2, i32 2, i32 2>
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ret <8 x half> %val1
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}
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define <8 x half> @shuffle_v4_v8f16_cond_r0_1(ptr addrspace(1) nocapture readonly %arg0, i1 %cond) local_unnamed_addr {
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; CHECK-LABEL: define <8 x half> @shuffle_v4_v8f16_cond_r0_1(
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; CHECK-SAME: ptr addrspace(1) readonly captures(none) [[ARG0:%.*]], i1 [[COND:%.*]]) local_unnamed_addr {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[VAL0:%.*]] = load <4 x half>, ptr addrspace(1) [[ARG0]], align 32
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; CHECK-NEXT: br i1 [[COND]], label %[[THEN:.*]], label %[[ELSE:.*]]
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; CHECK: [[THEN]]:
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; CHECK-NEXT: [[VAL1:%.*]] = shufflevector <4 x half> [[VAL0]], <4 x half> poison, <8 x i32> zeroinitializer
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; CHECK-NEXT: br label %[[FINALLY:.*]]
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; CHECK: [[ELSE]]:
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; CHECK-NEXT: [[VAL2:%.*]] = shufflevector <4 x half> [[VAL0]], <4 x half> poison, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: br label %[[FINALLY]]
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; CHECK: [[FINALLY]]:
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; CHECK-NEXT: [[VAL3:%.*]] = phi <8 x half> [ [[VAL1]], %[[THEN]] ], [ [[VAL2]], %[[ELSE]] ]
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; CHECK-NEXT: ret <8 x half> [[VAL3]]
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;
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entry:
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%val0 = load <4 x half>, ptr addrspace(1) %arg0, align 32
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br i1 %cond, label %then, label %else
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then:
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%val1 = shufflevector <4 x half> %val0, <4 x half> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
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br label %finally
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else:
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%val2 = shufflevector <4 x half> %val0, <4 x half> poison, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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br label %finally
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finally:
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%val3 = phi <8 x half> [ %val1, %then ], [ %val2, %else ]
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ret <8 x half> %val3
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}
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define <4 x half> @shuffle_v4_v4f16_cond_r1_2(ptr addrspace(1) nocapture readonly %arg0, i1 %cond) local_unnamed_addr {
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; CHECK-LABEL: define <4 x half> @shuffle_v4_v4f16_cond_r1_2(
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; CHECK-SAME: ptr addrspace(1) readonly captures(none) [[ARG0:%.*]], i1 [[COND:%.*]]) local_unnamed_addr {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[VAL0:%.*]] = load <4 x half>, ptr addrspace(1) [[ARG0]], align 32
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; CHECK-NEXT: br i1 [[COND]], label %[[THEN:.*]], label %[[ELSE:.*]]
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; CHECK: [[THEN]]:
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; CHECK-NEXT: [[VAL1:%.*]] = shufflevector <4 x half> [[VAL0]], <4 x half> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: br label %[[FINALLY:.*]]
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; CHECK: [[ELSE]]:
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; CHECK-NEXT: [[VAL2:%.*]] = shufflevector <4 x half> [[VAL0]], <4 x half> poison, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
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; CHECK-NEXT: br label %[[FINALLY]]
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; CHECK: [[FINALLY]]:
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; CHECK-NEXT: [[VAL3:%.*]] = phi <4 x half> [ [[VAL1]], %[[THEN]] ], [ [[VAL2]], %[[ELSE]] ]
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; CHECK-NEXT: ret <4 x half> [[VAL3]]
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;
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entry:
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%val0 = load <4 x half>, ptr addrspace(1) %arg0, align 32
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br i1 %cond, label %then, label %else
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then:
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%val1 = shufflevector <4 x half> %val0, <4 x half> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
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br label %finally
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else:
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%val2 = shufflevector <4 x half> %val0, <4 x half> poison, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
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br label %finally
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finally:
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%val3 = phi <4 x half> [ %val1, %then ], [ %val2, %else ]
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ret <4 x half> %val3
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}
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define <8 x half> @shuffle_v4_v8f16_cond_r1_2(ptr addrspace(1) nocapture readonly %arg0, i1 %cond) local_unnamed_addr {
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; CHECK-LABEL: define <8 x half> @shuffle_v4_v8f16_cond_r1_2(
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; CHECK-SAME: ptr addrspace(1) readonly captures(none) [[ARG0:%.*]], i1 [[COND:%.*]]) local_unnamed_addr {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[VAL0:%.*]] = load <4 x half>, ptr addrspace(1) [[ARG0]], align 32
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; CHECK-NEXT: br i1 [[COND]], label %[[THEN:.*]], label %[[ELSE:.*]]
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; CHECK: [[THEN]]:
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; CHECK-NEXT: [[VAL1:%.*]] = shufflevector <4 x half> [[VAL0]], <4 x half> poison, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: br label %[[FINALLY:.*]]
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; CHECK: [[ELSE]]:
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; CHECK-NEXT: [[VAL2:%.*]] = shufflevector <4 x half> [[VAL0]], <4 x half> poison, <8 x i32> <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
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; CHECK-NEXT: br label %[[FINALLY]]
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; CHECK: [[FINALLY]]:
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; CHECK-NEXT: [[VAL3:%.*]] = phi <8 x half> [ [[VAL1]], %[[THEN]] ], [ [[VAL2]], %[[ELSE]] ]
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; CHECK-NEXT: ret <8 x half> [[VAL3]]
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;
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entry:
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%val0 = load <4 x half>, ptr addrspace(1) %arg0, align 32
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br i1 %cond, label %then, label %else
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then:
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%val1 = shufflevector <4 x half> %val0, <4 x half> poison, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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br label %finally
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else:
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%val2 = shufflevector <4 x half> %val0, <4 x half> poison, <8 x i32> <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
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br label %finally
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finally:
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%val3 = phi <8 x half> [ %val1, %then ], [ %val2, %else ]
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ret <8 x half> %val3
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}
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define <8 x i32> @shuffle_v4_v8i32_r0_1(ptr addrspace(1) nocapture readonly %arg0) local_unnamed_addr {
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; CHECK-LABEL: define <8 x i32> @shuffle_v4_v8i32_r0_1(
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; CHECK-SAME: ptr addrspace(1) readonly captures(none) [[ARG0:%.*]]) local_unnamed_addr {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[VAL0:%.*]] = load <4 x i32>, ptr addrspace(1) [[ARG0]], align 32
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[VAL0]], <4 x i32> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: ret <8 x i32> [[TMP1]]
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;
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entry:
168+
%val0 = load <4 x i32>, ptr addrspace(1) %arg0, align 32
169+
%val1 = shufflevector <4 x i32> %val0, <4 x i32> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1>
170+
ret <8 x i32> %val1
171+
}
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define <8 x i32> @shuffle_v4_v8i32_r0_2(ptr addrspace(1) nocapture readonly %arg0) local_unnamed_addr {
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; CHECK-LABEL: define <8 x i32> @shuffle_v4_v8i32_r0_2(
175+
; CHECK-SAME: ptr addrspace(1) readonly captures(none) [[ARG0:%.*]]) local_unnamed_addr {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[VAL0:%.*]] = load <4 x i32>, ptr addrspace(1) [[ARG0]], align 32
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[VAL0]], <4 x i32> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 2, i32 2, i32 2, i32 2>
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; CHECK-NEXT: ret <8 x i32> [[TMP1]]
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;
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entry:
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%val0 = load <4 x i32>, ptr addrspace(1) %arg0, align 32
183+
%val1 = shufflevector <4 x i32> %val0, <4 x i32> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 2, i32 2, i32 2, i32 2>
184+
ret <8 x i32> %val1
185+
}
186+
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define <4 x i32> @shuffle_v4_v4i32_r1_2(ptr addrspace(1) nocapture readonly %arg0) local_unnamed_addr {
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; CHECK-LABEL: define <4 x i32> @shuffle_v4_v4i32_r1_2(
189+
; CHECK-SAME: ptr addrspace(1) readonly captures(none) [[ARG0:%.*]]) local_unnamed_addr {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[VAL0:%.*]] = load <4 x i32>, ptr addrspace(1) [[ARG0]], align 32
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[VAL0]], <4 x i32> poison, <4 x i32> <i32 1, i32 1, i32 2, i32 2>
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; CHECK-NEXT: ret <4 x i32> [[TMP1]]
194+
;
195+
entry:
196+
%val0 = load <4 x i32>, ptr addrspace(1) %arg0, align 32
197+
%val1 = shufflevector <4 x i32> %val0, <4 x i32> poison, <4 x i32> <i32 1, i32 1, i32 2, i32 2>
198+
ret <4 x i32> %val1
199+
}
200+
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define <8 x i32> @shuffle_v4_v8i32_r1_2(ptr addrspace(1) nocapture readonly %arg0) local_unnamed_addr {
202+
; CHECK-LABEL: define <8 x i32> @shuffle_v4_v8i32_r1_2(
203+
; CHECK-SAME: ptr addrspace(1) readonly captures(none) [[ARG0:%.*]]) local_unnamed_addr {
204+
; CHECK-NEXT: [[ENTRY:.*:]]
205+
; CHECK-NEXT: [[VAL0:%.*]] = load <4 x i32>, ptr addrspace(1) [[ARG0]], align 32
206+
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[VAL0]], <4 x i32> poison, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 2, i32 2, i32 2, i32 2>
207+
; CHECK-NEXT: ret <8 x i32> [[TMP1]]
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;
209+
entry:
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%val0 = load <4 x i32>, ptr addrspace(1) %arg0, align 32
211+
%val1 = shufflevector <4 x i32> %val0, <4 x i32> poison, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 2, i32 2, i32 2, i32 2>
212+
ret <8 x i32> %val1
213+
}
214+
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define <8 x i32> @shuffle_v4_v8i32_cond_r0_1(ptr addrspace(1) nocapture readonly %arg0, i1 %cond) local_unnamed_addr {
216+
; CHECK-LABEL: define <8 x i32> @shuffle_v4_v8i32_cond_r0_1(
217+
; CHECK-SAME: ptr addrspace(1) readonly captures(none) [[ARG0:%.*]], i1 [[COND:%.*]]) local_unnamed_addr {
218+
; CHECK-NEXT: [[ENTRY:.*:]]
219+
; CHECK-NEXT: [[VAL0:%.*]] = load <4 x i32>, ptr addrspace(1) [[ARG0]], align 32
220+
; CHECK-NEXT: br i1 [[COND]], label %[[THEN:.*]], label %[[ELSE:.*]]
221+
; CHECK: [[THEN]]:
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; CHECK-NEXT: [[VAL1:%.*]] = shufflevector <4 x i32> [[VAL0]], <4 x i32> poison, <8 x i32> zeroinitializer
223+
; CHECK-NEXT: br label %[[FINALLY:.*]]
224+
; CHECK: [[ELSE]]:
225+
; CHECK-NEXT: [[VAL2:%.*]] = shufflevector <4 x i32> [[VAL0]], <4 x i32> poison, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
226+
; CHECK-NEXT: br label %[[FINALLY]]
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; CHECK: [[FINALLY]]:
228+
; CHECK-NEXT: [[VAL3:%.*]] = phi <8 x i32> [ [[VAL1]], %[[THEN]] ], [ [[VAL2]], %[[ELSE]] ]
229+
; CHECK-NEXT: ret <8 x i32> [[VAL3]]
230+
;
231+
entry:
232+
%val0 = load <4 x i32>, ptr addrspace(1) %arg0, align 32
233+
br i1 %cond, label %then, label %else
234+
235+
then:
236+
%val1 = shufflevector <4 x i32> %val0, <4 x i32> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
237+
br label %finally
238+
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else:
240+
%val2 = shufflevector <4 x i32> %val0, <4 x i32> poison, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
241+
br label %finally
242+
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finally:
244+
%val3 = phi <8 x i32> [ %val1, %then ], [ %val2, %else ]
245+
ret <8 x i32> %val3
246+
}
247+
248+
define <8 x i32> @shuffle_v4_v8i32_cond_r0_2(ptr addrspace(1) nocapture readonly %arg0, i1 %cond) local_unnamed_addr {
249+
; CHECK-LABEL: define <8 x i32> @shuffle_v4_v8i32_cond_r0_2(
250+
; CHECK-SAME: ptr addrspace(1) readonly captures(none) [[ARG0:%.*]], i1 [[COND:%.*]]) local_unnamed_addr {
251+
; CHECK-NEXT: [[ENTRY:.*:]]
252+
; CHECK-NEXT: [[VAL0:%.*]] = load <4 x i32>, ptr addrspace(1) [[ARG0]], align 32
253+
; CHECK-NEXT: br i1 [[COND]], label %[[THEN:.*]], label %[[ELSE:.*]]
254+
; CHECK: [[THEN]]:
255+
; CHECK-NEXT: [[VAL1:%.*]] = shufflevector <4 x i32> [[VAL0]], <4 x i32> poison, <8 x i32> zeroinitializer
256+
; CHECK-NEXT: br label %[[FINALLY:.*]]
257+
; CHECK: [[ELSE]]:
258+
; CHECK-NEXT: [[VAL2:%.*]] = shufflevector <4 x i32> [[VAL0]], <4 x i32> poison, <8 x i32> <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
259+
; CHECK-NEXT: br label %[[FINALLY]]
260+
; CHECK: [[FINALLY]]:
261+
; CHECK-NEXT: [[VAL3:%.*]] = phi <8 x i32> [ [[VAL1]], %[[THEN]] ], [ [[VAL2]], %[[ELSE]] ]
262+
; CHECK-NEXT: ret <8 x i32> [[VAL3]]
263+
;
264+
entry:
265+
%val0 = load <4 x i32>, ptr addrspace(1) %arg0, align 32
266+
br i1 %cond, label %then, label %else
267+
268+
then:
269+
%val1 = shufflevector <4 x i32> %val0, <4 x i32> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
270+
br label %finally
271+
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else:
273+
%val2 = shufflevector <4 x i32> %val0, <4 x i32> poison, <8 x i32> <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
274+
br label %finally
275+
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finally:
277+
%val3 = phi <8 x i32> [ %val1, %then ], [ %val2, %else ]
278+
ret <8 x i32> %val3
279+
}
280+
281+
define <4 x i32> @shuffle_v4_v4i32_cond_r1_2(ptr addrspace(1) nocapture readonly %arg0, i1 %cond) local_unnamed_addr {
282+
; CHECK-LABEL: define <4 x i32> @shuffle_v4_v4i32_cond_r1_2(
283+
; CHECK-SAME: ptr addrspace(1) readonly captures(none) [[ARG0:%.*]], i1 [[COND:%.*]]) local_unnamed_addr {
284+
; CHECK-NEXT: [[ENTRY:.*:]]
285+
; CHECK-NEXT: [[VAL0:%.*]] = load <4 x i32>, ptr addrspace(1) [[ARG0]], align 32
286+
; CHECK-NEXT: br i1 [[COND]], label %[[THEN:.*]], label %[[ELSE:.*]]
287+
; CHECK: [[THEN]]:
288+
; CHECK-NEXT: [[VAL1:%.*]] = shufflevector <4 x i32> [[VAL0]], <4 x i32> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
289+
; CHECK-NEXT: br label %[[FINALLY:.*]]
290+
; CHECK: [[ELSE]]:
291+
; CHECK-NEXT: [[VAL2:%.*]] = shufflevector <4 x i32> [[VAL0]], <4 x i32> poison, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
292+
; CHECK-NEXT: br label %[[FINALLY]]
293+
; CHECK: [[FINALLY]]:
294+
; CHECK-NEXT: [[VAL3:%.*]] = phi <4 x i32> [ [[VAL1]], %[[THEN]] ], [ [[VAL2]], %[[ELSE]] ]
295+
; CHECK-NEXT: ret <4 x i32> [[VAL3]]
296+
;
297+
entry:
298+
%val0 = load <4 x i32>, ptr addrspace(1) %arg0, align 32
299+
br i1 %cond, label %then, label %else
300+
301+
then:
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%val1 = shufflevector <4 x i32> %val0, <4 x i32> poison, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
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br label %finally
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else:
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%val2 = shufflevector <4 x i32> %val0, <4 x i32> poison, <4 x i32> <i32 2, i32 2, i32 2, i32 2>
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br label %finally
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finally:
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%val3 = phi <4 x i32> [ %val1, %then ], [ %val2, %else ]
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ret <4 x i32> %val3
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}
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define <8 x i32> @shuffle_v4_v8i32_cond_r1_2(ptr addrspace(1) nocapture readonly %arg0, i1 %cond) local_unnamed_addr {
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; CHECK-LABEL: define <8 x i32> @shuffle_v4_v8i32_cond_r1_2(
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; CHECK-SAME: ptr addrspace(1) readonly captures(none) [[ARG0:%.*]], i1 [[COND:%.*]]) local_unnamed_addr {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[VAL0:%.*]] = load <4 x i32>, ptr addrspace(1) [[ARG0]], align 32
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; CHECK-NEXT: br i1 [[COND]], label %[[THEN:.*]], label %[[ELSE:.*]]
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; CHECK: [[THEN]]:
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; CHECK-NEXT: [[VAL1:%.*]] = shufflevector <4 x i32> [[VAL0]], <4 x i32> poison, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: br label %[[FINALLY:.*]]
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; CHECK: [[ELSE]]:
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; CHECK-NEXT: [[VAL2:%.*]] = shufflevector <4 x i32> [[VAL0]], <4 x i32> poison, <8 x i32> <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
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; CHECK-NEXT: br label %[[FINALLY]]
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; CHECK: [[FINALLY]]:
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; CHECK-NEXT: [[VAL3:%.*]] = phi <8 x i32> [ [[VAL1]], %[[THEN]] ], [ [[VAL2]], %[[ELSE]] ]
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; CHECK-NEXT: ret <8 x i32> [[VAL3]]
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;
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entry:
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%val0 = load <4 x i32>, ptr addrspace(1) %arg0, align 32
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br i1 %cond, label %then, label %else
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then:
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%val1 = shufflevector <4 x i32> %val0, <4 x i32> poison, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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br label %finally
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else:
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%val2 = shufflevector <4 x i32> %val0, <4 x i32> poison, <8 x i32> <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
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br label %finally
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finally:
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%val3 = phi <8 x i32> [ %val1, %then ], [ %val2, %else ]
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ret <8 x i32> %val3
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}

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