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1 | | -; RUN: llc -verify-machineinstrs -mcpu=pwr6 -mattr=+altivec < %s | FileCheck %s |
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6 |
| 2 | +; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \ |
| 3 | +; RUN: -mcpu=pwr6 -mattr=+altivec < %s | FileCheck %s |
2 | 4 |
|
3 | 5 | ; Check vector round to single-precision toward -infinity (vrfim) |
4 | 6 | ; instruction generation using Altivec. |
5 | 7 |
|
6 | | -target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" |
7 | | -target triple = "powerpc64-unknown-linux-gnu" |
8 | | - |
9 | 8 | declare <2 x double> @llvm.floor.v2f64(<2 x double> %p) |
10 | 9 | define <2 x double> @floor_v2f64(<2 x double> %p) |
| 10 | +; CHECK-LABEL: floor_v2f64: |
| 11 | +; CHECK: # %bb.0: |
| 12 | +; CHECK-NEXT: frim 1, 1 |
| 13 | +; CHECK-NEXT: frim 2, 2 |
| 14 | +; CHECK-NEXT: blr |
11 | 15 | { |
12 | 16 | %t = call <2 x double> @llvm.floor.v2f64(<2 x double> %p) |
13 | 17 | ret <2 x double> %t |
14 | 18 | } |
15 | | -; CHECK-LABEL: floor_v2f64: |
16 | | -; CHECK: frim |
17 | | -; CHECK: frim |
18 | 19 |
|
19 | 20 | declare <4 x double> @llvm.floor.v4f64(<4 x double> %p) |
20 | 21 | define <4 x double> @floor_v4f64(<4 x double> %p) |
| 22 | +; CHECK-LABEL: floor_v4f64: |
| 23 | +; CHECK: # %bb.0: |
| 24 | +; CHECK-NEXT: frim 1, 1 |
| 25 | +; CHECK-NEXT: frim 2, 2 |
| 26 | +; CHECK-NEXT: frim 3, 3 |
| 27 | +; CHECK-NEXT: frim 4, 4 |
| 28 | +; CHECK-NEXT: blr |
21 | 29 | { |
22 | 30 | %t = call <4 x double> @llvm.floor.v4f64(<4 x double> %p) |
23 | 31 | ret <4 x double> %t |
24 | 32 | } |
25 | | -; CHECK-LABEL: floor_v4f64: |
26 | | -; CHECK: frim |
27 | | -; CHECK: frim |
28 | | -; CHECK: frim |
29 | | -; CHECK: frim |
30 | 33 |
|
31 | 34 | declare <2 x double> @llvm.ceil.v2f64(<2 x double> %p) |
32 | 35 | define <2 x double> @ceil_v2f64(<2 x double> %p) |
| 36 | +; CHECK-LABEL: ceil_v2f64: |
| 37 | +; CHECK: # %bb.0: |
| 38 | +; CHECK-NEXT: frip 1, 1 |
| 39 | +; CHECK-NEXT: frip 2, 2 |
| 40 | +; CHECK-NEXT: blr |
33 | 41 | { |
34 | 42 | %t = call <2 x double> @llvm.ceil.v2f64(<2 x double> %p) |
35 | 43 | ret <2 x double> %t |
36 | 44 | } |
37 | | -; CHECK-LABEL: ceil_v2f64: |
38 | | -; CHECK: frip |
39 | | -; CHECK: frip |
40 | 45 |
|
41 | 46 | declare <4 x double> @llvm.ceil.v4f64(<4 x double> %p) |
42 | 47 | define <4 x double> @ceil_v4f64(<4 x double> %p) |
| 48 | +; CHECK-LABEL: ceil_v4f64: |
| 49 | +; CHECK: # %bb.0: |
| 50 | +; CHECK-NEXT: frip 1, 1 |
| 51 | +; CHECK-NEXT: frip 2, 2 |
| 52 | +; CHECK-NEXT: frip 3, 3 |
| 53 | +; CHECK-NEXT: frip 4, 4 |
| 54 | +; CHECK-NEXT: blr |
43 | 55 | { |
44 | 56 | %t = call <4 x double> @llvm.ceil.v4f64(<4 x double> %p) |
45 | 57 | ret <4 x double> %t |
46 | 58 | } |
47 | | -; CHECK-LABEL: ceil_v4f64: |
48 | | -; CHECK: frip |
49 | | -; CHECK: frip |
50 | | -; CHECK: frip |
51 | | -; CHECK: frip |
52 | 59 |
|
53 | 60 | declare <2 x double> @llvm.trunc.v2f64(<2 x double> %p) |
54 | 61 | define <2 x double> @trunc_v2f64(<2 x double> %p) |
| 62 | +; CHECK-LABEL: trunc_v2f64: |
| 63 | +; CHECK: # %bb.0: |
| 64 | +; CHECK-NEXT: friz 1, 1 |
| 65 | +; CHECK-NEXT: friz 2, 2 |
| 66 | +; CHECK-NEXT: blr |
55 | 67 | { |
56 | 68 | %t = call <2 x double> @llvm.trunc.v2f64(<2 x double> %p) |
57 | 69 | ret <2 x double> %t |
58 | 70 | } |
59 | | -; CHECK-LABEL: trunc_v2f64: |
60 | | -; CHECK: friz |
61 | | -; CHECK: friz |
62 | 71 |
|
63 | 72 | declare <4 x double> @llvm.trunc.v4f64(<4 x double> %p) |
64 | 73 | define <4 x double> @trunc_v4f64(<4 x double> %p) |
| 74 | +; CHECK-LABEL: trunc_v4f64: |
| 75 | +; CHECK: # %bb.0: |
| 76 | +; CHECK-NEXT: friz 1, 1 |
| 77 | +; CHECK-NEXT: friz 2, 2 |
| 78 | +; CHECK-NEXT: friz 3, 3 |
| 79 | +; CHECK-NEXT: friz 4, 4 |
| 80 | +; CHECK-NEXT: blr |
65 | 81 | { |
66 | 82 | %t = call <4 x double> @llvm.trunc.v4f64(<4 x double> %p) |
67 | 83 | ret <4 x double> %t |
68 | 84 | } |
69 | | -; CHECK-LABEL: trunc_v4f64: |
70 | | -; CHECK: friz |
71 | | -; CHECK: friz |
72 | | -; CHECK: friz |
73 | | -; CHECK: friz |
74 | 85 |
|
75 | 86 | declare <2 x double> @llvm.nearbyint.v2f64(<2 x double> %p) |
76 | | -define <2 x double> @nearbyint_v2f64(<2 x double> %p) |
| 87 | +define <2 x double> @nearbyint_v2f64(<2 x double> %p) nounwind |
| 88 | +; CHECK-LABEL: nearbyint_v2f64: |
| 89 | +; CHECK: # %bb.0: |
| 90 | +; CHECK-NEXT: mflr 0 |
| 91 | +; CHECK-NEXT: stdu 1, -128(1) |
| 92 | +; CHECK-NEXT: std 0, 144(1) |
| 93 | +; CHECK-NEXT: stfd 30, 112(1) # 8-byte Folded Spill |
| 94 | +; CHECK-NEXT: stfd 31, 120(1) # 8-byte Folded Spill |
| 95 | +; CHECK-NEXT: fmr 31, 2 |
| 96 | +; CHECK-NEXT: bl nearbyint |
| 97 | +; CHECK-NEXT: nop |
| 98 | +; CHECK-NEXT: fmr 30, 1 |
| 99 | +; CHECK-NEXT: fmr 1, 31 |
| 100 | +; CHECK-NEXT: bl nearbyint |
| 101 | +; CHECK-NEXT: nop |
| 102 | +; CHECK-NEXT: fmr 2, 1 |
| 103 | +; CHECK-NEXT: fmr 1, 30 |
| 104 | +; CHECK-NEXT: lfd 31, 120(1) # 8-byte Folded Reload |
| 105 | +; CHECK-NEXT: lfd 30, 112(1) # 8-byte Folded Reload |
| 106 | +; CHECK-NEXT: addi 1, 1, 128 |
| 107 | +; CHECK-NEXT: ld 0, 16(1) |
| 108 | +; CHECK-NEXT: mtlr 0 |
| 109 | +; CHECK-NEXT: blr |
77 | 110 | { |
78 | 111 | %t = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> %p) |
79 | 112 | ret <2 x double> %t |
80 | 113 | } |
81 | | -; CHECK-LABEL: nearbyint_v2f64: |
82 | | -; CHECK: bl nearbyint |
83 | | -; CHECK: bl nearbyint |
84 | 114 |
|
85 | 115 | declare <4 x double> @llvm.nearbyint.v4f64(<4 x double> %p) |
86 | | -define <4 x double> @nearbyint_v4f64(<4 x double> %p) |
| 116 | +define <4 x double> @nearbyint_v4f64(<4 x double> %p) nounwind |
| 117 | +; CHECK-LABEL: nearbyint_v4f64: |
| 118 | +; CHECK: # %bb.0: |
| 119 | +; CHECK-NEXT: mflr 0 |
| 120 | +; CHECK-NEXT: stdu 1, -144(1) |
| 121 | +; CHECK-NEXT: std 0, 160(1) |
| 122 | +; CHECK-NEXT: stfd 28, 112(1) # 8-byte Folded Spill |
| 123 | +; CHECK-NEXT: stfd 29, 120(1) # 8-byte Folded Spill |
| 124 | +; CHECK-NEXT: fmr 29, 2 |
| 125 | +; CHECK-NEXT: stfd 30, 128(1) # 8-byte Folded Spill |
| 126 | +; CHECK-NEXT: fmr 30, 3 |
| 127 | +; CHECK-NEXT: stfd 31, 136(1) # 8-byte Folded Spill |
| 128 | +; CHECK-NEXT: fmr 31, 4 |
| 129 | +; CHECK-NEXT: bl nearbyint |
| 130 | +; CHECK-NEXT: nop |
| 131 | +; CHECK-NEXT: fmr 28, 1 |
| 132 | +; CHECK-NEXT: fmr 1, 29 |
| 133 | +; CHECK-NEXT: bl nearbyint |
| 134 | +; CHECK-NEXT: nop |
| 135 | +; CHECK-NEXT: fmr 29, 1 |
| 136 | +; CHECK-NEXT: fmr 1, 30 |
| 137 | +; CHECK-NEXT: bl nearbyint |
| 138 | +; CHECK-NEXT: nop |
| 139 | +; CHECK-NEXT: fmr 30, 1 |
| 140 | +; CHECK-NEXT: fmr 1, 31 |
| 141 | +; CHECK-NEXT: bl nearbyint |
| 142 | +; CHECK-NEXT: nop |
| 143 | +; CHECK-NEXT: fmr 4, 1 |
| 144 | +; CHECK-NEXT: fmr 1, 28 |
| 145 | +; CHECK-NEXT: lfd 31, 136(1) # 8-byte Folded Reload |
| 146 | +; CHECK-NEXT: lfd 28, 112(1) # 8-byte Folded Reload |
| 147 | +; CHECK-NEXT: fmr 2, 29 |
| 148 | +; CHECK-NEXT: fmr 3, 30 |
| 149 | +; CHECK-NEXT: lfd 30, 128(1) # 8-byte Folded Reload |
| 150 | +; CHECK-NEXT: lfd 29, 120(1) # 8-byte Folded Reload |
| 151 | +; CHECK-NEXT: addi 1, 1, 144 |
| 152 | +; CHECK-NEXT: ld 0, 16(1) |
| 153 | +; CHECK-NEXT: mtlr 0 |
| 154 | +; CHECK-NEXT: blr |
87 | 155 | { |
88 | 156 | %t = call <4 x double> @llvm.nearbyint.v4f64(<4 x double> %p) |
89 | 157 | ret <4 x double> %t |
90 | 158 | } |
91 | | -; CHECK-LABEL: nearbyint_v4f64: |
92 | | -; CHECK: bl nearbyint |
93 | | -; CHECK: bl nearbyint |
94 | | -; CHECK: bl nearbyint |
95 | | -; CHECK: bl nearbyint |
96 | 159 |
|
97 | 160 |
|
98 | 161 | declare <4 x float> @llvm.floor.v4f32(<4 x float> %p) |
99 | 162 | define <4 x float> @floor_v4f32(<4 x float> %p) |
| 163 | +; CHECK-LABEL: floor_v4f32: |
| 164 | +; CHECK: # %bb.0: |
| 165 | +; CHECK-NEXT: vrfim 2, 2 |
| 166 | +; CHECK-NEXT: blr |
100 | 167 | { |
101 | 168 | %t = call <4 x float> @llvm.floor.v4f32(<4 x float> %p) |
102 | 169 | ret <4 x float> %t |
103 | 170 | } |
104 | | -; CHECK-LABEL: floor_v4f32: |
105 | | -; CHECK: vrfim |
106 | 171 |
|
107 | 172 | declare <8 x float> @llvm.floor.v8f32(<8 x float> %p) |
108 | 173 | define <8 x float> @floor_v8f32(<8 x float> %p) |
| 174 | +; CHECK-LABEL: floor_v8f32: |
| 175 | +; CHECK: # %bb.0: |
| 176 | +; CHECK-NEXT: vrfim 2, 2 |
| 177 | +; CHECK-NEXT: vrfim 3, 3 |
| 178 | +; CHECK-NEXT: blr |
109 | 179 | { |
110 | 180 | %t = call <8 x float> @llvm.floor.v8f32(<8 x float> %p) |
111 | 181 | ret <8 x float> %t |
112 | 182 | } |
113 | | -; CHECK-LABEL: floor_v8f32: |
114 | | -; CHECK: vrfim |
115 | | -; CHECK: vrfim |
116 | 183 |
|
117 | 184 | declare <4 x float> @llvm.ceil.v4f32(<4 x float> %p) |
118 | 185 | define <4 x float> @ceil_v4f32(<4 x float> %p) |
| 186 | +; CHECK-LABEL: ceil_v4f32: |
| 187 | +; CHECK: # %bb.0: |
| 188 | +; CHECK-NEXT: vrfip 2, 2 |
| 189 | +; CHECK-NEXT: blr |
119 | 190 | { |
120 | 191 | %t = call <4 x float> @llvm.ceil.v4f32(<4 x float> %p) |
121 | 192 | ret <4 x float> %t |
122 | 193 | } |
123 | | -; CHECK-LABEL: ceil_v4f32: |
124 | | -; CHECK: vrfip |
125 | 194 |
|
126 | 195 | declare <8 x float> @llvm.ceil.v8f32(<8 x float> %p) |
127 | 196 | define <8 x float> @ceil_v8f32(<8 x float> %p) |
| 197 | +; CHECK-LABEL: ceil_v8f32: |
| 198 | +; CHECK: # %bb.0: |
| 199 | +; CHECK-NEXT: vrfip 2, 2 |
| 200 | +; CHECK-NEXT: vrfip 3, 3 |
| 201 | +; CHECK-NEXT: blr |
128 | 202 | { |
129 | 203 | %t = call <8 x float> @llvm.ceil.v8f32(<8 x float> %p) |
130 | 204 | ret <8 x float> %t |
131 | 205 | } |
132 | | -; CHECK-LABEL: ceil_v8f32: |
133 | | -; CHECK: vrfip |
134 | | -; CHECK: vrfip |
135 | 206 |
|
136 | 207 | declare <4 x float> @llvm.trunc.v4f32(<4 x float> %p) |
137 | 208 | define <4 x float> @trunc_v4f32(<4 x float> %p) |
| 209 | +; CHECK-LABEL: trunc_v4f32: |
| 210 | +; CHECK: # %bb.0: |
| 211 | +; CHECK-NEXT: vrfiz 2, 2 |
| 212 | +; CHECK-NEXT: blr |
138 | 213 | { |
139 | 214 | %t = call <4 x float> @llvm.trunc.v4f32(<4 x float> %p) |
140 | 215 | ret <4 x float> %t |
141 | 216 | } |
142 | | -; CHECK-LABEL: trunc_v4f32: |
143 | | -; CHECK: vrfiz |
144 | 217 |
|
145 | 218 | declare <8 x float> @llvm.trunc.v8f32(<8 x float> %p) |
146 | 219 | define <8 x float> @trunc_v8f32(<8 x float> %p) |
| 220 | +; CHECK-LABEL: trunc_v8f32: |
| 221 | +; CHECK: # %bb.0: |
| 222 | +; CHECK-NEXT: vrfiz 2, 2 |
| 223 | +; CHECK-NEXT: vrfiz 3, 3 |
| 224 | +; CHECK-NEXT: blr |
147 | 225 | { |
148 | 226 | %t = call <8 x float> @llvm.trunc.v8f32(<8 x float> %p) |
149 | 227 | ret <8 x float> %t |
150 | 228 | } |
151 | | -; CHECK-LABEL: trunc_v8f32: |
152 | | -; CHECK: vrfiz |
153 | | -; CHECK: vrfiz |
154 | 229 |
|
155 | 230 | declare <4 x float> @llvm.nearbyint.v4f32(<4 x float> %p) |
156 | 231 | define <4 x float> @nearbyint_v4f32(<4 x float> %p) |
| 232 | +; CHECK-LABEL: nearbyint_v4f32: |
| 233 | +; CHECK: # %bb.0: |
| 234 | +; CHECK-NEXT: vrfin 2, 2 |
| 235 | +; CHECK-NEXT: blr |
157 | 236 | { |
158 | 237 | %t = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %p) |
159 | 238 | ret <4 x float> %t |
160 | 239 | } |
161 | | -; CHECK-LABEL: nearbyint_v4f32: |
162 | | -; CHECK: vrfin |
163 | 240 |
|
164 | 241 | declare <8 x float> @llvm.nearbyint.v8f32(<8 x float> %p) |
165 | 242 | define <8 x float> @nearbyint_v8f32(<8 x float> %p) |
| 243 | +; CHECK-LABEL: nearbyint_v8f32: |
| 244 | +; CHECK: # %bb.0: |
| 245 | +; CHECK-NEXT: vrfin 2, 2 |
| 246 | +; CHECK-NEXT: vrfin 3, 3 |
| 247 | +; CHECK-NEXT: blr |
166 | 248 | { |
167 | 249 | %t = call <8 x float> @llvm.nearbyint.v8f32(<8 x float> %p) |
168 | 250 | ret <8 x float> %t |
169 | 251 | } |
170 | | -; CHECK-LABEL: nearbyint_v8f32: |
171 | | -; CHECK: vrfin |
172 | | -; CHECK: vrfin |
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