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address pr feedback
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2 files changed

+100
-25
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‎clang/lib/CodeGen/CGHLSLBuiltins.cpp‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -382,7 +382,8 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
382382
}
383383
case Builtin::BI__builtin_hlsl_dot2add: {
384384
llvm::Triple::ArchType Arch = CGM.getTarget().getTriple().getArch();
385-
assert(Arch == llvm::Triple::dxil && "Intrinsic dot2add is only allowed for dxil architecture");
385+
assert(Arch == llvm::Triple::dxil &&
386+
"Intrinsic dot2add is only allowed for dxil architecture");
386387
Value *A = EmitScalarExpr(E->getArg(0));
387388
Value *B = EmitScalarExpr(E->getArg(1));
388389
Value *C = EmitScalarExpr(E->getArg(2));

‎clang/test/CodeGenHLSL/builtins/dot2add.hlsl‎

Lines changed: 98 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1,46 +1,58 @@
11
// RUN: %clang_cc1 -finclude-default-header -fnative-half-type -triple \
2-
// RUN: dxil-pc-shadermodel6.3-compute %s -emit-llvm -disable-llvm-passes -o - | \
2+
// RUN: dxil-pc-shadermodel6.3-compute %s -emit-llvm -o - | \
33
// RUN: FileCheck %s --check-prefixes=CHECK,CHECK-DXIL
44
// RUN: %clang_cc1 -finclude-default-header -fnative-half-type -triple \
5-
// RUN: spirv-pc-vulkan-compute %s -emit-llvm -disable-llvm-passes -o - | \
5+
// RUN: spirv-pc-vulkan-compute %s -emit-llvm -o - | \
66
// RUN: FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV
77

88
// Test basic lowering to runtime function call.
99

10-
// CHECK-LABEL: define {{.*}}test
11-
float test_default_parameter(half2 p1, half2 p2, float p3) {
12-
// CHECK-SPIRV: %[[RES:.*]] = call {{.*}} float @_ZN4hlsl7dot2addEDv2_DhS0_f(<2 x half> {{.*}} %1, <2 x half> {{.*}} %2, float {{.*}} %3) #3 {{.*}}
13-
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @_ZN4hlsl7dot2addEDv2_DhS0_f(<2 x half> {{.*}} %0, <2 x half> {{.*}} %1, float {{.*}} %2) #2
10+
// CHECK-LABEL: define {{.*}}test_default_parameter_type
11+
float test_default_parameter_type(half2 p1, half2 p2, float p3) {
12+
// CHECK-SPIRV: %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %7, <2 x half> %8)
13+
// CHECK-SPIRV: %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
14+
// CHECK-SPIRV: %[[C:.*]] = load float, ptr %c.addr.i, align 4
15+
// CHECK-SPIRV: %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
16+
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add.v2f16(<2 x half> %6, <2 x half> %7, float %8)
1417
// CHECK: ret float %[[RES]]
1518
return dot2add(p1, p2, p3);
1619
}
1720

1821
// CHECK-LABEL: define {{.*}}test_float_arg2_type
1922
float test_float_arg2_type(half2 p1, float2 p2, float p3) {
20-
// CHECK-SPIRV: %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %2 to <2 x half>
21-
// CHECK-SPIRV: %[[RES:.*]] = call {{.*}} float @_ZN4hlsl7dot2addEDv2_DhS0_f(<2 x half> {{.*}} %1, <2 x half> {{.*}} %conv, float {{.*}} %3) #3 {{.*}}
23+
// CHECK-SPIRV: %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %2 to <2 x half>
24+
// CHECK-SPIRV: %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %7, <2 x half> %8)
25+
// CHECK-SPIRV: %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
26+
// CHECK-SPIRV: %[[C:.*]] = load float, ptr %c.addr.i, align 4
27+
// CHECK-SPIRV: %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
2228
// CHECK-DXIL: %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %1 to <2 x half>
23-
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @_ZN4hlsl7dot2addEDv2_DhS0_f(<2 x half> {{.*}} %0, <2 x half> {{.*}} %conv, float {{.*}} %2) #2
29+
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add.v2f16(<2 x half> %6, <2 x half> %7, float %8)
2430
// CHECK: ret float %[[RES]]
2531
return dot2add(p1, p2, p3);
2632
}
2733

2834
// CHECK-LABEL: define {{.*}}test_float_arg1_type
2935
float test_float_arg1_type(float2 p1, half2 p2, float p3) {
3036
// CHECK-SPIRV: %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %1 to <2 x half>
31-
// CHECK-SPIRV: %[[RES:.*]] = call {{.*}} float @_ZN4hlsl7dot2addEDv2_DhS0_f(<2 x half> {{.*}} %conv, <2 x half> {{.*}} %2, float {{.*}} %3) #3 {{.*}}
37+
// CHECK-SPIRV: %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %7, <2 x half> %8)
38+
// CHECK-SPIRV: %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
39+
// CHECK-SPIRV: %[[C:.*]] = load float, ptr %c.addr.i, align 4
40+
// CHECK-SPIRV: %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
3241
// CHECK-DXIL: %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %0 to <2 x half>
33-
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @_ZN4hlsl7dot2addEDv2_DhS0_f(<2 x half> {{.*}} %conv, <2 x half> {{.*}} %1, float {{.*}} %2) #2
42+
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add.v2f16(<2 x half> %6, <2 x half> %7, float %8)
3443
// CHECK: ret float %[[RES]]
3544
return dot2add(p1, p2, p3);
3645
}
3746

3847
// CHECK-LABEL: define {{.*}}test_double_arg3_type
3948
float test_double_arg3_type(half2 p1, half2 p2, double p3) {
4049
// CHECK-SPIRV: %conv = fptrunc reassoc nnan ninf nsz arcp afn double %3 to float
41-
// CHECK-SPIRV: %[[RES:.*]] = call {{.*}} float @_ZN4hlsl7dot2addEDv2_DhS0_f(<2 x half> {{.*}} %1, <2 x half> {{.*}} %2, float {{.*}} %conv) #3 {{.*}}
50+
// CHECK-SPIRV: %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %7, <2 x half> %8)
51+
// CHECK-SPIRV: %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
52+
// CHECK-SPIRV: %[[C:.*]] = load float, ptr %c.addr.i, align 4
53+
// CHECK-SPIRV: %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
4254
// CHECK-DXIL: %conv = fptrunc reassoc nnan ninf nsz arcp afn double %2 to float
43-
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @_ZN4hlsl7dot2addEDv2_DhS0_f(<2 x half> {{.*}} %0, <2 x half> {{.*}} %1, float {{.*}} %conv) #2
55+
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add.v2f16(<2 x half> %6, <2 x half> %7, float %8)
4456
// CHECK: ret float %[[RES]]
4557
return dot2add(p1, p2, p3);
4658
}
@@ -49,10 +61,28 @@ float test_double_arg3_type(half2 p1, half2 p2, double p3) {
4961
float test_float_arg1_arg2_type(float2 p1, float2 p2, float p3) {
5062
// CHECK-SPIRV: %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %1 to <2 x half>
5163
// CHECK-SPIRV: %conv1 = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %2 to <2 x half>
52-
// CHECK-SPIRV: %[[RES:.*]] = call {{.*}} float @_ZN4hlsl7dot2addEDv2_DhS0_f(<2 x half> {{.*}} %conv, <2 x half> {{.*}} %conv1, float {{.*}} %3) #3 {{.*}}
64+
// CHECK-SPIRV: %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %7, <2 x half> %8)
65+
// CHECK-SPIRV: %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
66+
// CHECK-SPIRV: %[[C:.*]] = load float, ptr %c.addr.i, align 4
67+
// CHECK-SPIRV: %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
5368
// CHECK-DXIL: %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %0 to <2 x half>
5469
// CHECK-DXIL: %conv1 = fptrunc reassoc nnan ninf nsz arcp afn <2 x float> %1 to <2 x half>
55-
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @_ZN4hlsl7dot2addEDv2_DhS0_f(<2 x half> {{.*}} %conv, <2 x half> {{.*}} %conv1, float {{.*}} %2) #2
70+
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add.v2f16(<2 x half> %6, <2 x half> %7, float %8)
71+
// CHECK: ret float %[[RES]]
72+
return dot2add(p1, p2, p3);
73+
}
74+
75+
// CHECK-LABEL: define {{.*}}test_double_arg1_arg2_type
76+
float test_double_arg1_arg2_type(double2 p1, double2 p2, float p3) {
77+
// CHECK-SPIRV: %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x double> %1 to <2 x half>
78+
// CHECK-SPIRV: %conv1 = fptrunc reassoc nnan ninf nsz arcp afn <2 x double> %2 to <2 x half>
79+
// CHECK-SPIRV: %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %7, <2 x half> %8)
80+
// CHECK-SPIRV: %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
81+
// CHECK-SPIRV: %[[C:.*]] = load float, ptr %c.addr.i, align 4
82+
// CHECK-SPIRV: %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
83+
// CHECK-DXIL: %conv = fptrunc reassoc nnan ninf nsz arcp afn <2 x double> %0 to <2 x half>
84+
// CHECK-DXIL: %conv1 = fptrunc reassoc nnan ninf nsz arcp afn <2 x double> %1 to <2 x half>
85+
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add.v2f16(<2 x half> %6, <2 x half> %7, float %8)
5686
// CHECK: ret float %[[RES]]
5787
return dot2add(p1, p2, p3);
5888
}
@@ -61,18 +91,62 @@ float test_float_arg1_arg2_type(float2 p1, float2 p2, float p3) {
6191
float test_int16_arg1_arg2_type(int16_t2 p1, int16_t2 p2, float p3) {
6292
// CHECK-SPIRV: %conv = sitofp <2 x i16> %1 to <2 x half>
6393
// CHECK-SPIRV: %conv1 = sitofp <2 x i16> %2 to <2 x half>
64-
// CHECK-SPIRV: %[[RES:.*]] = call {{.*}} float @_ZN4hlsl7dot2addEDv2_DhS0_f(<2 x half> {{.*}} %conv, <2 x half> {{.*}} %conv1, float {{.*}} %3) #3 {{.*}}
94+
// CHECK-SPIRV: %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %7, <2 x half> %8)
95+
// CHECK-SPIRV: %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
96+
// CHECK-SPIRV: %[[C:.*]] = load float, ptr %c.addr.i, align 4
97+
// CHECK-SPIRV: %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
6598
// CHECK-DXIL: %conv = sitofp <2 x i16> %0 to <2 x half>
6699
// CHECK-DXIL: %conv1 = sitofp <2 x i16> %1 to <2 x half>
67-
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @_ZN4hlsl7dot2addEDv2_DhS0_f(<2 x half> {{.*}} %conv, <2 x half> {{.*}} %conv1, float {{.*}} %2) #2
100+
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add.v2f16(<2 x half> %6, <2 x half> %7, float %8)
101+
// CHECK: ret float %[[RES]]
102+
return dot2add(p1, p2, p3);
103+
}
104+
105+
// CHECK-LABEL: define {{.*}}test_int32_arg1_arg2_type
106+
float test_int32_arg1_arg2_type(int32_t2 p1, int32_t2 p2, float p3) {
107+
// CHECK-SPIRV: %conv = sitofp <2 x i32> %1 to <2 x half>
108+
// CHECK-SPIRV: %conv1 = sitofp <2 x i32> %2 to <2 x half>
109+
// CHECK-SPIRV: %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %7, <2 x half> %8)
110+
// CHECK-SPIRV: %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
111+
// CHECK-SPIRV: %[[C:.*]] = load float, ptr %c.addr.i, align 4
112+
// CHECK-SPIRV: %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
113+
// CHECK-DXIL: %conv = sitofp <2 x i32> %0 to <2 x half>
114+
// CHECK-DXIL: %conv1 = sitofp <2 x i32> %1 to <2 x half>
115+
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add.v2f16(<2 x half> %6, <2 x half> %7, float %8)
68116
// CHECK: ret float %[[RES]]
69117
return dot2add(p1, p2, p3);
70118
}
71119

72-
// CHECK-LABEL: define {{.*}}dot2add_impl
73-
// CHECK-SPIRV: %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %1, <2 x half> %2)
74-
// CHECK-SPIRV: %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
75-
// CHECK-SPIRV: %[[C:.*]] = load float, ptr %c.addr, align 4
76-
// CHECK-SPIRV: %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
77-
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add.v2f16(<2 x half> %0, <2 x half> %1, float %2)
78-
// CHECK: ret float %[[RES]]
120+
// CHECK-LABEL: define {{.*}}test_int64_arg1_arg2_type
121+
float test_int64_arg1_arg2_type(int64_t2 p1, int64_t2 p2, float p3) {
122+
// CHECK-SPIRV: %conv = sitofp <2 x i64> %1 to <2 x half>
123+
// CHECK-SPIRV: %conv1 = sitofp <2 x i64> %2 to <2 x half>
124+
// CHECK-SPIRV: %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %7, <2 x half> %8)
125+
// CHECK-SPIRV: %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
126+
// CHECK-SPIRV: %[[C:.*]] = load float, ptr %c.addr.i, align 4
127+
// CHECK-SPIRV: %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
128+
// CHECK-DXIL: %conv = sitofp <2 x i64> %0 to <2 x half>
129+
// CHECK-DXIL: %conv1 = sitofp <2 x i64> %1 to <2 x half>
130+
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add.v2f16(<2 x half> %6, <2 x half> %7, float %8)
131+
// CHECK: ret float %[[RES]]
132+
return dot2add(p1, p2, p3);
133+
}
134+
135+
// CHECK-LABEL: define {{.*}}test_bool_arg1_arg2_type
136+
float test_bool_arg1_arg2_type(bool2 p1, bool2 p2, float p3) {
137+
// CHECK-SPIRV: %loadedv = trunc <2 x i32> %3 to <2 x i1>
138+
// CHECK-SPIRV: %conv = uitofp <2 x i1> %loadedv to <2 x half>
139+
// CHECK-SPIRV: %loadedv1 = trunc <2 x i32> %4 to <2 x i1>
140+
// CHECK-SPIRV: %conv2 = uitofp <2 x i1> %loadedv1 to <2 x half>
141+
// CHECK-SPIRV: %[[MUL:.*]] = call reassoc nnan ninf nsz arcp afn half @llvm.spv.fdot.v2f16(<2 x half> %9, <2 x half> %10)
142+
// CHECK-SPIRV: %[[CONV:.*]] = fpext reassoc nnan ninf nsz arcp afn half %[[MUL]] to float
143+
// CHECK-SPIRV: %[[C:.*]] = load float, ptr %c.addr.i, align 4
144+
// CHECK-SPIRV: %[[RES:.*]] = fadd reassoc nnan ninf nsz arcp afn float %[[CONV]], %[[C]]
145+
// CHECK-DXIL: %loadedv = trunc <2 x i32> %2 to <2 x i1>
146+
// CHECK-DXIL: %conv = uitofp <2 x i1> %loadedv to <2 x half>
147+
// CHECK-DXIL: %loadedv1 = trunc <2 x i32> %3 to <2 x i1>
148+
// CHECK-DXIL: %conv2 = uitofp <2 x i1> %loadedv1 to <2 x half>
149+
// CHECK-DXIL: %[[RES:.*]] = call {{.*}} float @llvm.dx.dot2add.v2f16(<2 x half> %8, <2 x half> %9, float %10)
150+
// CHECK: ret float %[[RES]]
151+
return dot2add(p1, p2, p3);
152+
}

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