Skip to content

Commit 3ad70d9

Browse files
zhaoqi5zhaoqi5
committed
[LoongArch] Add patterns to support vector type average instructions generation
1 parent 505f45a commit 3ad70d9

File tree

2 files changed

+100
-0
lines changed

2 files changed

+100
-0
lines changed

‎llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td‎

Lines changed: 50 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2024,6 +2024,56 @@ def : Pat<(v4i32(fp_to_uint v4f64:$vj)),
20242024
(XVFTINTRZ_LU_D v4f64:$vj)),
20252025
sub_128)>;
20262026

2027+
// XVAVG_{B/H/W/D/BU/HU/WU/DU}, XVAVGR_{B/H/W/D/BU/HU/WU/DU}
2028+
def : Pat<(sra (v32i8 (add v32i8:$xj, v32i8:$xk)), (v32i8 (vsplat_imm_eq_1))),
2029+
(XVAVG_B v32i8:$xj, v32i8:$xk)>;
2030+
def : Pat<(sra (v16i16 (add v16i16:$xj, v16i16:$xk)), (v16i16 (vsplat_imm_eq_1))),
2031+
(XVAVG_H v16i16:$xj, v16i16:$xk)>;
2032+
def : Pat<(sra (v8i32 (add v8i32:$xj, v8i32:$xk)), (v8i32 (vsplat_imm_eq_1))),
2033+
(XVAVG_W v8i32:$xj, v8i32:$xk)>;
2034+
def : Pat<(sra (v4i64 (add v4i64:$xj, v4i64:$xk)), (v4i64 (vsplat_imm_eq_1))),
2035+
(XVAVG_D v4i64:$xj, v4i64:$xk)>;
2036+
def : Pat<(srl (v32i8 (add v32i8:$xj, v32i8:$xk)), (v32i8 (vsplat_imm_eq_1))),
2037+
(XVAVG_BU v32i8:$xj, v32i8:$xk)>;
2038+
def : Pat<(srl (v16i16 (add v16i16:$xj, v16i16:$xk)), (v16i16 (vsplat_imm_eq_1))),
2039+
(XVAVG_HU v16i16:$xj, v16i16:$xk)>;
2040+
def : Pat<(srl (v8i32 (add v8i32:$xj, v8i32:$xk)), (v8i32 (vsplat_imm_eq_1))),
2041+
(XVAVG_WU v8i32:$xj, v8i32:$xk)>;
2042+
def : Pat<(srl (v4i64 (add v4i64:$xj, v4i64:$xk)), (v4i64 (vsplat_imm_eq_1))),
2043+
(XVAVG_DU v4i64:$xj, v4i64:$xk)>;
2044+
def : Pat<(sra (v32i8 (add (v32i8 (add v32i8:$vj, v32i8:$vk)),
2045+
(v32i8 (vsplat_imm_eq_1)))),
2046+
(v32i8 (vsplat_imm_eq_1))),
2047+
(XVAVGR_B v32i8:$vj, v32i8:$vk)>;
2048+
def : Pat<(sra (v16i16 (add (v16i16 (add v16i16:$vj, v16i16:$vk)),
2049+
(v16i16 (vsplat_imm_eq_1)))),
2050+
(v16i16 (vsplat_imm_eq_1))),
2051+
(XVAVGR_H v16i16:$vj, v16i16:$vk)>;
2052+
def : Pat<(sra (v8i32 (add (v8i32 (add v8i32:$vj, v8i32:$vk)),
2053+
(v8i32 (vsplat_imm_eq_1)))),
2054+
(v8i32 (vsplat_imm_eq_1))),
2055+
(XVAVGR_W v8i32:$vj, v8i32:$vk)>;
2056+
def : Pat<(sra (v4i64 (add (v4i64 (add v4i64:$vj, v4i64:$vk)),
2057+
(v4i64 (vsplat_imm_eq_1)))),
2058+
(v4i64 (vsplat_imm_eq_1))),
2059+
(XVAVGR_D v4i64:$vj, v4i64:$vk)>;
2060+
def : Pat<(srl (v32i8 (add (v32i8 (add v32i8:$vj, v32i8:$vk)),
2061+
(v32i8 (vsplat_imm_eq_1)))),
2062+
(v32i8 (vsplat_imm_eq_1))),
2063+
(XVAVGR_BU v32i8:$vj, v32i8:$vk)>;
2064+
def : Pat<(srl (v16i16 (add (v16i16 (add v16i16:$vj, v16i16:$vk)),
2065+
(v16i16 (vsplat_imm_eq_1)))),
2066+
(v16i16 (vsplat_imm_eq_1))),
2067+
(XVAVGR_HU v16i16:$vj, v16i16:$vk)>;
2068+
def : Pat<(srl (v8i32 (add (v8i32 (add v8i32:$vj, v8i32:$vk)),
2069+
(v8i32 (vsplat_imm_eq_1)))),
2070+
(v8i32 (vsplat_imm_eq_1))),
2071+
(XVAVGR_WU v8i32:$vj, v8i32:$vk)>;
2072+
def : Pat<(srl (v4i64 (add (v4i64 (add v4i64:$vj, v4i64:$vk)),
2073+
(v4i64 (vsplat_imm_eq_1)))),
2074+
(v4i64 (vsplat_imm_eq_1))),
2075+
(XVAVGR_DU v4i64:$vj, v4i64:$vk)>;
2076+
20272077
// abs
20282078
def : Pat<(abs v32i8:$xj), (XVSIGNCOV_B v32i8:$xj, v32i8:$xj)>;
20292079
def : Pat<(abs v16i16:$xj), (XVSIGNCOV_H v16i16:$xj, v16i16:$xj)>;

‎llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td‎

Lines changed: 50 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2154,6 +2154,56 @@ def : Pat<(f32 f32imm_vldi:$in),
21542154
def : Pat<(f64 f64imm_vldi:$in),
21552155
(f64 (EXTRACT_SUBREG (VLDI (to_f64imm_vldi f64imm_vldi:$in)), sub_64))>;
21562156

2157+
// VAVG_{B/H/W/D/BU/HU/WU/DU}, VAVGR_{B/H/W/D/BU/HU/WU/DU}
2158+
def : Pat<(sra (v16i8 (add v16i8:$vj, v16i8:$vk)), (v16i8 (vsplat_imm_eq_1))),
2159+
(VAVG_B v16i8:$vj, v16i8:$vk)>;
2160+
def : Pat<(sra (v8i16 (add v8i16:$vj, v8i16:$vk)), (v8i16 (vsplat_imm_eq_1))),
2161+
(VAVG_H v8i16:$vj, v8i16:$vk)>;
2162+
def : Pat<(sra (v4i32 (add v4i32:$vj, v4i32:$vk)), (v4i32 (vsplat_imm_eq_1))),
2163+
(VAVG_W v4i32:$vj, v4i32:$vk)>;
2164+
def : Pat<(sra (v2i64 (add v2i64:$vj, v2i64:$vk)), (v2i64 (vsplat_imm_eq_1))),
2165+
(VAVG_D v2i64:$vj, v2i64:$vk)>;
2166+
def : Pat<(srl (v16i8 (add v16i8:$vj, v16i8:$vk)), (v16i8 (vsplat_imm_eq_1))),
2167+
(VAVG_BU v16i8:$vj, v16i8:$vk)>;
2168+
def : Pat<(srl (v8i16 (add v8i16:$vj, v8i16:$vk)), (v8i16 (vsplat_imm_eq_1))),
2169+
(VAVG_HU v8i16:$vj, v8i16:$vk)>;
2170+
def : Pat<(srl (v4i32 (add v4i32:$vj, v4i32:$vk)), (v4i32 (vsplat_imm_eq_1))),
2171+
(VAVG_WU v4i32:$vj, v4i32:$vk)>;
2172+
def : Pat<(srl (v2i64 (add v2i64:$vj, v2i64:$vk)), (v2i64 (vsplat_imm_eq_1))),
2173+
(VAVG_DU v2i64:$vj, v2i64:$vk)>;
2174+
def : Pat<(sra (v16i8 (add (v16i8 (add v16i8:$vj, v16i8:$vk)),
2175+
(v16i8 (vsplat_imm_eq_1)))),
2176+
(v16i8 (vsplat_imm_eq_1))),
2177+
(VAVGR_B v16i8:$vj, v16i8:$vk)>;
2178+
def : Pat<(sra (v8i16 (add (v8i16 (add v8i16:$vj, v8i16:$vk)),
2179+
(v8i16 (vsplat_imm_eq_1)))),
2180+
(v8i16 (vsplat_imm_eq_1))),
2181+
(VAVGR_H v8i16:$vj, v8i16:$vk)>;
2182+
def : Pat<(sra (v4i32 (add (v4i32 (add v4i32:$vj, v4i32:$vk)),
2183+
(v4i32 (vsplat_imm_eq_1)))),
2184+
(v4i32 (vsplat_imm_eq_1))),
2185+
(VAVGR_W v4i32:$vj, v4i32:$vk)>;
2186+
def : Pat<(sra (v2i64 (add (v2i64 (add v2i64:$vj, v2i64:$vk)),
2187+
(v2i64 (vsplat_imm_eq_1)))),
2188+
(v2i64 (vsplat_imm_eq_1))),
2189+
(VAVGR_D v2i64:$vj, v2i64:$vk)>;
2190+
def : Pat<(srl (v16i8 (add (v16i8 (add v16i8:$vj, v16i8:$vk)),
2191+
(v16i8 (vsplat_imm_eq_1)))),
2192+
(v16i8 (vsplat_imm_eq_1))),
2193+
(VAVGR_BU v16i8:$vj, v16i8:$vk)>;
2194+
def : Pat<(srl (v8i16 (add (v8i16 (add v8i16:$vj, v8i16:$vk)),
2195+
(v8i16 (vsplat_imm_eq_1)))),
2196+
(v8i16 (vsplat_imm_eq_1))),
2197+
(VAVGR_HU v8i16:$vj, v8i16:$vk)>;
2198+
def : Pat<(srl (v4i32 (add (v4i32 (add v4i32:$vj, v4i32:$vk)),
2199+
(v4i32 (vsplat_imm_eq_1)))),
2200+
(v4i32 (vsplat_imm_eq_1))),
2201+
(VAVGR_WU v4i32:$vj, v4i32:$vk)>;
2202+
def : Pat<(srl (v2i64 (add (v2i64 (add v2i64:$vj, v2i64:$vk)),
2203+
(v2i64 (vsplat_imm_eq_1)))),
2204+
(v2i64 (vsplat_imm_eq_1))),
2205+
(VAVGR_DU v2i64:$vj, v2i64:$vk)>;
2206+
21572207
// abs
21582208
def : Pat<(abs v16i8:$vj), (VSIGNCOV_B v16i8:$vj, v16i8:$vj)>;
21592209
def : Pat<(abs v8i16:$vj), (VSIGNCOV_H v8i16:$vj, v8i16:$vj)>;

0 commit comments

Comments
 (0)