@@ -107,8 +107,7 @@ void M68kAsmBackend::applyFixup(const MCFragment &F, const MCFixup &Fixup,
107107// / MI—Minus VC—Overflow clear
108108// / LE—Less than or equal
109109// / NE—Not equal VS—Overflow set
110- static unsigned getRelaxedOpcodeBranch (const MCInst &Inst) {
111- unsigned Op = Inst.getOpcode ();
110+ static unsigned getRelaxedOpcodeBranch (unsigned Op) {
112111 switch (Op) {
113112 default :
114113 return Op;
@@ -179,37 +178,17 @@ static unsigned getRelaxedOpcodeBranch(const MCInst &Inst) {
179178 }
180179}
181180
182- static unsigned getRelaxedOpcodeArith (const MCInst &Inst) {
183- unsigned Op = Inst.getOpcode ();
181+ static unsigned getRelaxedOpcode (unsigned Opcode) {
184182 // NOTE there will be some relaxations for PCD and ARD mem for x20
185- return Op;
186- }
187-
188- static unsigned getRelaxedOpcode (const MCInst &Inst) {
189- unsigned R = getRelaxedOpcodeArith (Inst);
190- if (R != Inst.getOpcode ())
191- return R;
192- return getRelaxedOpcodeBranch (Inst);
183+ return getRelaxedOpcodeBranch (Opcode);
193184}
194185
195186bool M68kAsmBackend::mayNeedRelaxation (const MCInst &Inst,
196187 const MCSubtargetInfo &STI) const {
197188 // Branches can always be relaxed in either mode.
198- if (getRelaxedOpcodeBranch (Inst) != Inst.getOpcode ())
199- return true ;
189+ return getRelaxedOpcode (Inst.getOpcode ()) != Inst.getOpcode ();
200190
201- // Check if this instruction is ever relaxable.
202- if (getRelaxedOpcodeArith (Inst) == Inst.getOpcode ())
203- return false ;
204-
205- // Check if the relaxable operand has an expression. For the current set of
206- // relaxable instructions, the relaxable operand is always the last operand.
207191 // NOTE will change for x20 mem
208- unsigned RelaxableOp = Inst.getNumOperands () - 1 ;
209- if (Inst.getOperand (RelaxableOp).isExpr ())
210- return true ;
211-
212- return false ;
213192}
214193
215194bool M68kAsmBackend::fixupNeedsRelaxation (const MCFixup &Fixup,
@@ -242,7 +221,7 @@ bool M68kAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
242221// we can relax?
243222void M68kAsmBackend::relaxInstruction (MCInst &Inst,
244223 const MCSubtargetInfo &STI) const {
245- unsigned RelaxedOp = getRelaxedOpcode (Inst);
224+ unsigned RelaxedOp = getRelaxedOpcode (Inst. getOpcode () );
246225
247226 if (RelaxedOp == Inst.getOpcode ()) {
248227 SmallString<256 > Tmp;
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